364 lines
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364 lines
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<main>
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<h1 id="inline-assembly"><a class="header" href="#inline-assembly">Inline assembly</a></h1>
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<ul>
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<li><a href="#overview">Overview</a></li>
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<li><a href="#ast">AST</a></li>
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<li><a href="#hir">HIR</a></li>
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<li><a href="#type-checking">Type checking</a></li>
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<li><a href="#thir">THIR</a></li>
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<li><a href="#mir">MIR</a></li>
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<li><a href="#codegen">Codegen</a></li>
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<li><a href="#adding-support-for-new-architectures">Adding support for new architectures</a></li>
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<li><a href="#tests">Tests</a></li>
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</ul>
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<h2 id="overview"><a class="header" href="#overview">Overview</a></h2>
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<p>Inline assembly in rustc mostly revolves around taking an <code>asm!</code> macro invocation and plumbing it
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through all of the compiler layers down to LLVM codegen. Throughout the various stages, an
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<code>InlineAsm</code> generally consists of 3 components:</p>
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<ul>
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<li>
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<p>The template string, which is stored as an array of <code>InlineAsmTemplatePiece</code>. Each piece
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represents either a literal or a placeholder for an operand (just like format strings).</p>
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<pre><pre class="playground"><code class="language-rust"><span class="boring">#![allow(unused)]
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</span><span class="boring">fn main() {
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</span>pub enum InlineAsmTemplatePiece {
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String(String),
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Placeholder { operand_idx: usize, modifier: Option<char>, span: Span },
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}
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<span class="boring">}</span></code></pre></pre>
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</li>
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<li>
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<p>The list of operands to the <code>asm!</code> (<code>in</code>, <code>[late]out</code>, <code>in[late]out</code>, <code>sym</code>, <code>const</code>). These are
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represented differently at each stage of lowering, but follow a common pattern:</p>
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<ul>
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<li><code>in</code>, <code>out</code> and <code>inout</code> all have an associated register class (<code>reg</code>) or explicit register
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(<code>"eax"</code>).</li>
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<li><code>inout</code> has 2 forms: one with a single expression that is both read from and written to, and
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one with two separate expressions for the input and output parts.</li>
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<li><code>out</code> and <code>inout</code> have a <code>late</code> flag (<code>lateout</code> / <code>inlateout</code>) to indicate that the register
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allocator is allowed to reuse an input register for this output.</li>
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<li><code>out</code> and the split variant of <code>inout</code> allow <code>_</code> to be specified for an output, which means
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that the output is discarded. This is used to allocate scratch registers for assembly code.</li>
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<li><code>const</code> refers to an anonymous constants and generally works like an inline const.</li>
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<li><code>sym</code> is a bit special since it only accepts a path expression, which must point to a <code>static</code>
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or a <code>fn</code>.</li>
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</ul>
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</li>
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<li>
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<p>The options set at the end of the <code>asm!</code> macro. The only ones that are of particular interest to
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rustc are <code>NORETURN</code> which makes <code>asm!</code> return <code>!</code> instead of <code>()</code>, and <code>RAW</code> which disables format
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string parsing. The remaining options are mostly passed through to LLVM with little processing.</p>
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<pre><pre class="playground"><code class="language-rust"><span class="boring">#![allow(unused)]
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</span><span class="boring">fn main() {
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</span>bitflags::bitflags! {
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pub struct InlineAsmOptions: u16 {
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const PURE = 1 << 0;
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const NOMEM = 1 << 1;
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const READONLY = 1 << 2;
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const PRESERVES_FLAGS = 1 << 3;
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const NORETURN = 1 << 4;
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const NOSTACK = 1 << 5;
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const ATT_SYNTAX = 1 << 6;
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const RAW = 1 << 7;
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const MAY_UNWIND = 1 << 8;
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}
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}
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<span class="boring">}</span></code></pre></pre>
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</li>
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</ul>
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<h2 id="ast"><a class="header" href="#ast">AST</a></h2>
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<p><code>InlineAsm</code> is represented as an expression in the AST with the <a href="https://doc.rust-lang.org/nightly/nightly-rustc/rustc_ast/ast/struct.InlineAsm.html"><code>ast::InlineAsm</code> type</a>.</p>
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<p>The <code>asm!</code> macro is implemented in <code>rustc_builtin_macros</code> and outputs an <code>InlineAsm</code> AST node. The
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template string is parsed using <code>fmt_macros</code>, positional and named operands are resolved to
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explicit operand indices. Since target information is not available to macro invocations,
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validation of the registers and register classes is deferred to AST lowering.</p>
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<h2 id="hir"><a class="header" href="#hir">HIR</a></h2>
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<p><code>InlineAsm</code> is represented as an expression in the HIR with the <a href="https://doc.rust-lang.org/nightly/nightly-rustc/rustc_hir/hir/struct.InlineAsm.html"><code>hir::InlineAsm</code> type</a>.</p>
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<p>AST lowering is where <code>InlineAsmRegOrRegClass</code> is converted from <code>Symbol</code>s to an actual register or
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register class. If any modifiers are specified for a template string placeholder, these are
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validated against the set allowed for that operand type. Finally, explicit registers for inputs and
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outputs are checked for conflicts (same register used for different operands).</p>
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<h2 id="type-checking"><a class="header" href="#type-checking">Type checking</a></h2>
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<p>Each register class has a whitelist of types that it may be used with. After the types of all
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operands have been determined, the <code>intrinsicck</code> pass will check that these types are in the
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whitelist. It also checks that split <code>inout</code> operands have compatible types and that <code>const</code>
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operands are integers or floats. Suggestions are emitted where needed if a template modifier should
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be used for an operand based on the type that was passed into it.</p>
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<h2 id="thir"><a class="header" href="#thir">THIR</a></h2>
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<p><code>InlineAsm</code> is represented as an expression in the THIR with the <a href="https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/thir/struct.InlineAsmExpr.html"><code>InlineAsmExpr</code> type</a>.</p>
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<p>The only significant change compared to HIR is that <code>Sym</code> has been lowered to either a <code>SymFn</code>
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whose <code>expr</code> is a <code>Literal</code> ZST of the <code>fn</code>, or a <code>SymStatic</code> which points to the <code>DefId</code> of a
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<code>static</code>.</p>
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<h2 id="mir"><a class="header" href="#mir">MIR</a></h2>
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<p><code>InlineAsm</code> is represented as a <code>Terminator</code> in the MIR with the <a href="https://doc.rust-lang.org/nightly/nightly-rustc/rustc_middle/mir/enum.TerminatorKind.html#variant.InlineAsm"><code>TerminatorKind::InlineAsm</code> variant</a></p>
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<p>As part of THIR lowering, <code>InOut</code> and <code>SplitInOut</code> operands are lowered to a split form with a
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separate <code>in_value</code> and <code>out_place</code>.</p>
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<p>Semantically, the <code>InlineAsm</code> terminator is similar to the <code>Call</code> terminator except that it has
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multiple output places where a <code>Call</code> only has a single return place output.</p>
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<h2 id="codegen"><a class="header" href="#codegen">Codegen</a></h2>
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<p>Operands are lowered one more time before being passed to LLVM codegen, this is represented by the <a href="https://doc.rust-lang.org/nightly/nightly-rustc/rustc_codegen_ssa/traits/enum.InlineAsmOperandRef.html"><code>InlineAsmOperandRef</code> type</a> from <code>rustc_codegen_ssa</code>.</p>
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<p>The operands are lowered to LLVM operands and constraint codes as follows:</p>
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<ul>
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<li><code>out</code> and the output part of <code>inout</code> operands are added first, as required by LLVM. Late output
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operands have a <code>=</code> prefix added to their constraint code, non-late output operands have a <code>=&</code>
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prefix added to their constraint code.</li>
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<li><code>in</code> operands are added normally.</li>
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<li><code>inout</code> operands are tied to the matching output operand.</li>
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<li><code>sym</code> operands are passed as function pointers or pointers, using the <code>"s"</code> constraint.</li>
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<li><code>const</code> operands are formatted to a string and directly inserted in the template string.</li>
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</ul>
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<p>The template string is converted to LLVM form:</p>
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<ul>
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<li><code>$</code> characters are escaped as <code>$$</code>.</li>
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<li><code>const</code> operands are converted to strings and inserted directly.</li>
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<li>Placeholders are formatted as <code>${X:M}</code> where <code>X</code> is the operand index and <code>M</code> is the modifier
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character. Modifiers are converted from the Rust form to the LLVM form.</li>
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</ul>
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<p>The various options are converted to clobber constraints or LLVM attributes, refer to the
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<a href="https://github.com/Amanieu/rfcs/blob/inline-asm/text/0000-inline-asm.md#mapping-to-llvm-ir">RFC</a>
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for more details.</p>
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<p>Note that LLVM is sometimes rather picky about what types it accepts for certain constraint codes
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so we sometimes need to insert conversions to/from a supported type. See the target-specific
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ISelLowering.cpp files in LLVM for details of what types are supported for each register class.</p>
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<h2 id="adding-support-for-new-architectures"><a class="header" href="#adding-support-for-new-architectures">Adding support for new architectures</a></h2>
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<p>Adding inline assembly support to an architecture is mostly a matter of defining the registers and
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register classes for that architecture. All the definitions for register classes are located in
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<code>compiler/rustc_target/asm/</code>.</p>
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<p>Additionally you will need to implement lowering of these register classes to LLVM constraint codes
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in <code>compiler/rustc_codegen_llvm/asm.rs</code>.</p>
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<p>When adding a new architecture, make sure to cross-reference with the LLVM source code:</p>
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<ul>
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<li>LLVM has restrictions on which types can be used with a particular constraint code. Refer to the
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<code>getRegForInlineAsmConstraint</code> function in <code>lib/Target/${ARCH}/${ARCH}ISelLowering.cpp</code>.</li>
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<li>LLVM reserves certain registers for its internal use, which causes them to not be saved/restored
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properly around inline assembly blocks. These registers are listed in the <code>getReservedRegs</code>
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function in <code>lib/Target/${ARCH}/${ARCH}RegisterInfo.cpp</code>. Any "conditionally" reserved register
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such as the frame/base pointer must always be treated as reserved for Rust purposes because we
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can't know ahead of time whether a function will require a frame/base pointer.</li>
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</ul>
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<h2 id="tests"><a class="header" href="#tests">Tests</a></h2>
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<p>Various tests for inline assembly are available:</p>
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<ul>
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<li><code>tests/assembly/asm</code></li>
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<li><code>tests/ui/asm</code></li>
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<li><code>tests/codegen/asm-*</code></li>
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</ul>
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<p>Every architecture supported by inline assembly must have exhaustive tests in
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<code>tests/assembly/asm</code> which test all combinations of register classes and types.</p>
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</div>
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</body>
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</html>
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