fanzha02 fa04d488bd cmd/asm: fix the issue of moving 128-bit integers to vector registers on arm64 ... The CL 249758 added `FMOVQ $vcon, Vd` instruction and assembler used 128-bit simd literal-loading to load `$vcon` from pool into 128-bit vector register `Vd`. Because Go does not have 128-bit integers for now, the assembler will report an error of `immediate out of range` when assembleing `FMOVQ $0x123456789abcdef0123456789abcdef, V0` instruction. This patch lets 128-bit integers take two 64-bit operands, for the high and low parts separately and adds `VMOVQ $hi, $lo, Vd` instruction to move `$hi<<64+$lo' into 128-bit register `Vd`. In addition, this patch renames `FMOVQ/FMOVD/FMOVS` ops to 'VMOVQ/VMOVD/VMOVS' and uses them to move 128-bit, 64-bit and 32-bit constants into vector registers, respectively Update the go doc. Fixes #40725 Change-Id: Ia3c83bb6463f104d2bee960905053a97299e0a3a Reviewed-on: https://go-review.googlesource.com/c/go/+/255900 Trust: fannie zhang <Fannie.Zhang@arm.com> Reviewed-by: Cherry Zhang <cherryyz@google.com>		2020-09-25 01:47:40 +00:00
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arch.go	cmd/asm,cmd/internal/obj/riscv: provide branch pseudo-instructions	2020-03-31 13:13:58 +00:00
arm.go	…
arm64.go	cmd/asm: fix the issue of moving 128-bit integers to vector registers on arm64	2020-09-25 01:47:40 +00:00
mips.go	cmd/asm: add MIPS MSA LD/ST/LDI support for mips64x	2020-03-04 19:06:44 +00:00
ppc64.go	cmd/asm,cmd/compile: clean up isel codegen on ppc64x	2019-09-18 15:54:32 +00:00
riscv64.go	cmd/asm,cmd/internal/obj/riscv: add atomic memory operation instructions	2020-03-15 08:13:28 +00:00
s390x.go	cmd/asm/internal/arch: delete unused s390x functions	2019-10-17 14:55:25 +00:00