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16 Commits

Author SHA1 Message Date
Joel Sing 24902c5be6 cmd/internal/obj/riscv: handle MOV rewrites in separate pass 
Handle the rewriting of MOV pseudo-instructions in a separate pass. This allows
AMOV to be more readily used by other code, including AGETCALLERPC and ARET
implementations.

Updates #27532

Change-Id: Iea794121210048ed23ed0fb8f3c5e3cd5354a311
Reviewed-on: https://go-review.googlesource.com/c/go/+/212758
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2020-01-04 04:10:21 +00:00
Joel Sing 48ed1e6113 cmd/internal/obj/riscv: handle AGETCALLERPC 
Updates #27532

Change-Id: Ib3e44ec524ed20bbfbbaf40df22cec335460f3ef
Reviewed-on: https://go-review.googlesource.com/c/go/+/204629
Run-TryBot: Joel Sing <joel@sing.id.au>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
 2019-12-24 04:59:06 +00:00
Joel Sing 24f08103d2 cmd/internal/obj/riscv: handle FEQ/FNEG/SEQZ/SNEZ 
Based on riscv-go port.

Updates #27532

Change-Id: I5e7f45955e1dfdb9d09cc6a4e6f3ce81216d411d
Reviewed-on: https://go-review.googlesource.com/c/go/+/204628
Reviewed-by: Cherry Zhang <cherryyz@google.com>
 2019-12-24 03:50:29 +00:00
Joel Sing 7cab55dfd3 cmd/internal/obj/riscv: handle call, jmp and branch 
Also provide REG_LR to more clearly define the link register.

Based on the riscv-go port.

Updates #27532

Change-Id: I0805f373682f93b3918a01c21d4ef34eb3817c75
Reviewed-on: https://go-review.googlesource.com/c/go/+/204627
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-12-24 03:42:15 +00:00
Joel Sing 8cf5293caa cmd/internal/obj/riscv: split immediates larger than 12-bits 
Handle immediates larger than 12-bits by rewriting as an LUI instruction with
the high bits, followed by the original instruction with the low bits.

Based on the riscv-go port.

Updates #27532

Change-Id: I8ed6d6e6db06fb8a27f3ab75f467ec2b7ff1f075
Reviewed-on: https://go-review.googlesource.com/c/go/+/204626
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-11-19 06:10:03 +00:00
Joel Sing 1046a9cb1b cmd/link,cmd/internal/obj/riscv: implement archreloc for riscv64 
Based on the riscv-go port.

Updates #27532

Change-Id: I478254306441c253d3a2c09c10932ad1ac0be3c6
Reviewed-on: https://go-review.googlesource.com/c/go/+/204625
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-11-19 06:08:56 +00:00
Joel Sing a04aa1f6d1 cmd/internal/obj/riscv: implement MOV pseudo-instructions 
Add support for rewriting MOV pseudo-instructions into appropriate
RISC-V instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: I22da6f5f12c841d56fb676ab2a37f6d0a686b033
Reviewed-on: https://go-review.googlesource.com/c/go/+/198677
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-10-15 00:53:01 +00:00
Joel Sing 08165932f7 cmd/internal/obj/riscv: require memory targets for load and store instructions 
This allows for `LD 4(X5), X6' rather than `LD $4, X5, X6'. Similar for other
load and store instructions. It is worth noting that none of these are likely
to be used directly once the MOV pseudo-instructions are implemented.

Updates #27532

Change-Id: Ie043c2dedd2cdaceb258b27976cfb3f74aa1cc1d
Reviewed-on: https://go-review.googlesource.com/c/go/+/196842
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-26 17:56:30 +00:00
Joel Sing a37f2b4f60 cmd/internal/obj/riscv: implement control transfer instructions 
Add support for assembling control transfer instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: I205d3ccd0a48deeaace0f20fca8516f382a83fae
Reviewed-on: https://go-review.googlesource.com/c/go/+/196841
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-26 17:37:02 +00:00
Joel Sing 430d2aa349 cmd/internal/obj/riscv: implement AUIPC and LUI instructions 
Add support for assembling AUIPC and LUI instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: I178868b6dcc6fdc6b8527454569a3538ed50723e
Reviewed-on: https://go-review.googlesource.com/c/go/+/196840
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-26 17:34:54 +00:00
Joel Sing 434e4caf1b cmd/internal/obj/riscv: implement floating point instructions 
Add support for assembling various single-precision and double-precision
floating point instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: Iac1aec9b03bb6cbf116b229daeef944d4df550fa
Reviewed-on: https://go-review.googlesource.com/c/go/+/196839
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-25 08:25:43 +00:00
Joel Sing e29d276d55 cmd/internal/obj/riscv: implement RV64I integer computational instructions 
Add support for assembling RV64I integer computational instructions.

Based on the riscv-go port.

Updates #27532

Integer Computational Instructions (RV64I)

Change-Id: I1a082b3901c997da309d737d081f57ea2821bc62
Reviewed-on: https://go-review.googlesource.com/c/go/+/196838
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-24 04:19:31 +00:00
Joel Sing ced2454220 cmd/internal/obj/riscv: add environment call/breakpoint and base counter/timer instructions 
This implements assembler support for ECALL/EBREAK, along with base
counter/timer instructions.

Based on riscv-go port.

Updates #27532

Change-Id: I690a9fd835eeddee1fe9a5616d2b2f856d3952b8
Reviewed-on: https://go-review.googlesource.com/c/go/+/195918
Reviewed-by: Cherry Zhang <cherryyz@google.com>
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
 2019-09-24 04:16:35 +00:00
Joel Sing dfbc9c83a9 cmd/internal/obj/riscv: add load, store and multiplication instructions 
Add support for assembling load, store and multiplication instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: Ia7b6e60ae45416a82f240e7b7fc101a36ce18886
Reviewed-on: https://go-review.googlesource.com/c/go/+/195917
Reviewed-by: Cherry Zhang <cherryyz@google.com>
 2019-09-20 14:33:26 +00:00
Joel Sing c3c53661ba cmd/asm,cmd/internal/obj/riscv: implement integer computational instructions 
Add support for assembling integer computational instructions.

Based on the riscv-go port.

Updates #27532

Change-Id: Ibf02649eebd65ce96002a9ca0624266d96def2cd
Reviewed-on: https://go-review.googlesource.com/c/go/+/195079
Run-TryBot: Joel Sing <joel@sing.id.au>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
 2019-09-17 04:37:46 +00:00
Joel Sing 6c6ad3086e cmd/asm,cmd/internal/obj: initial support for riscv64 assembler 
Provide the initial framework for the riscv64 assembler. For now this
only supports raw WORD instructions, but at least allows for basic
testing. Additional functionality will be added in separate changes.

Based on the riscv-go port.

Updates #27532

Change-Id: I181ffb2d37a34764a3e91eded177d13a89c69f9a
Reviewed-on: https://go-review.googlesource.com/c/go/+/194117
Reviewed-by: Cherry Zhang <cherryyz@google.com>
 2019-09-12 18:54:38 +00:00