mirror of https://github.com/golang/go.git
cmd/compile: rewrite some ARM64 rules to use typed aux
Passes toolstash-check -all. Change-Id: I7ec36bc048f3031c8201107e6fc5d1257271dbf1 Reviewed-on: https://go-review.googlesource.com/c/go/+/234379 Run-TryBot: Alberto Donizetti <alb.donizetti@gmail.com> TryBot-Result: Go Bot <gobot@golang.org> Trust: Alberto Donizetti <alb.donizetti@gmail.com> Reviewed-by: Keith Randall <khr@golang.org>
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ea33523877
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@ -1116,280 +1116,280 @@
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// if a register move has only 1 use, just use the same register without emitting instruction
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// MOVDnop doesn't emit instruction, only for ensuring the type.
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(MOVDreg x) && x.Uses == 1 -> (MOVDnop x)
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(MOVDreg x) && x.Uses == 1 => (MOVDnop x)
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// fold constant into arithmatic ops
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(ADD x (MOVDconst [c])) -> (ADDconst [c] x)
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(SUB x (MOVDconst [c])) -> (SUBconst [c] x)
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(AND x (MOVDconst [c])) -> (ANDconst [c] x)
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(OR x (MOVDconst [c])) -> (ORconst [c] x)
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(XOR x (MOVDconst [c])) -> (XORconst [c] x)
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(TST x (MOVDconst [c])) -> (TSTconst [c] x)
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(TSTW x (MOVDconst [c])) -> (TSTWconst [c] x)
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(CMN x (MOVDconst [c])) -> (CMNconst [c] x)
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(CMNW x (MOVDconst [c])) -> (CMNWconst [c] x)
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(BIC x (MOVDconst [c])) -> (ANDconst [^c] x)
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(EON x (MOVDconst [c])) -> (XORconst [^c] x)
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(ORN x (MOVDconst [c])) -> (ORconst [^c] x)
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(ADD x (MOVDconst [c])) => (ADDconst [c] x)
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(SUB x (MOVDconst [c])) => (SUBconst [c] x)
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(AND x (MOVDconst [c])) => (ANDconst [c] x)
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(OR x (MOVDconst [c])) => (ORconst [c] x)
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(XOR x (MOVDconst [c])) => (XORconst [c] x)
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(TST x (MOVDconst [c])) => (TSTconst [c] x)
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(TSTW x (MOVDconst [c])) => (TSTWconst [int32(c)] x)
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(CMN x (MOVDconst [c])) => (CMNconst [c] x)
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(CMNW x (MOVDconst [c])) => (CMNWconst [int32(c)] x)
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(BIC x (MOVDconst [c])) => (ANDconst [^c] x)
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(EON x (MOVDconst [c])) => (XORconst [^c] x)
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(ORN x (MOVDconst [c])) => (ORconst [^c] x)
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(SLL x (MOVDconst [c])) -> (SLLconst x [c&63]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=64)
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(SRL x (MOVDconst [c])) -> (SRLconst x [c&63])
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(SRA x (MOVDconst [c])) -> (SRAconst x [c&63])
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(SLL x (MOVDconst [c])) => (SLLconst x [c&63]) // Note: I don't think we ever generate bad constant shifts (i.e. c>=64)
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(SRL x (MOVDconst [c])) => (SRLconst x [c&63])
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(SRA x (MOVDconst [c])) => (SRAconst x [c&63])
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(CMP x (MOVDconst [c])) -> (CMPconst [c] x)
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(CMP (MOVDconst [c]) x) -> (InvertFlags (CMPconst [c] x))
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(CMP x (MOVDconst [c])) => (CMPconst [c] x)
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(CMP (MOVDconst [c]) x) => (InvertFlags (CMPconst [c] x))
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(CMPW x (MOVDconst [c])) => (CMPWconst [int32(c)] x)
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(CMPW (MOVDconst [c]) x) => (InvertFlags (CMPWconst [int32(c)] x))
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// Canonicalize the order of arguments to comparisons - helps with CSE.
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((CMP|CMPW) x y) && x.ID > y.ID -> (InvertFlags ((CMP|CMPW) y x))
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((CMP|CMPW) x y) && x.ID > y.ID => (InvertFlags ((CMP|CMPW) y x))
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// mul-neg -> mneg
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(NEG (MUL x y)) -> (MNEG x y)
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(NEG (MULW x y)) -> (MNEGW x y)
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(MUL (NEG x) y) -> (MNEG x y)
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(MULW (NEG x) y) -> (MNEGW x y)
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// mul-neg => mneg
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(NEG (MUL x y)) => (MNEG x y)
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(NEG (MULW x y)) => (MNEGW x y)
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(MUL (NEG x) y) => (MNEG x y)
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(MULW (NEG x) y) => (MNEGW x y)
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// madd/msub
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(ADD a l:(MUL x y)) && l.Uses==1 && clobber(l) -> (MADD a x y)
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(SUB a l:(MUL x y)) && l.Uses==1 && clobber(l) -> (MSUB a x y)
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(ADD a l:(MNEG x y)) && l.Uses==1 && clobber(l) -> (MSUB a x y)
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(SUB a l:(MNEG x y)) && l.Uses==1 && clobber(l) -> (MADD a x y)
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(ADD a l:(MUL x y)) && l.Uses==1 && clobber(l) => (MADD a x y)
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(SUB a l:(MUL x y)) && l.Uses==1 && clobber(l) => (MSUB a x y)
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(ADD a l:(MNEG x y)) && l.Uses==1 && clobber(l) => (MSUB a x y)
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(SUB a l:(MNEG x y)) && l.Uses==1 && clobber(l) => (MADD a x y)
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(ADD a l:(MULW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) -> (MADDW a x y)
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(SUB a l:(MULW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) -> (MSUBW a x y)
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(ADD a l:(MNEGW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) -> (MSUBW a x y)
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(SUB a l:(MNEGW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) -> (MADDW a x y)
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(ADD a l:(MULW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) => (MADDW a x y)
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(SUB a l:(MULW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) => (MSUBW a x y)
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(ADD a l:(MNEGW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) => (MSUBW a x y)
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(SUB a l:(MNEGW x y)) && a.Type.Size() != 8 && l.Uses==1 && clobber(l) => (MADDW a x y)
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// optimize ADCSflags, SBCSflags and friends
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(ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c)))) -> (ADCSflags x y c)
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(ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0])))) -> (ADDSflags x y)
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(SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo))))) -> (SBCSflags x y bo)
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(SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0])))) -> (SUBSflags x y)
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(ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c)))) => (ADCSflags x y c)
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(ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0])))) => (ADDSflags x y)
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(SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo))))) => (SBCSflags x y bo)
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(SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0])))) => (SUBSflags x y)
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// mul by constant
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(MUL x (MOVDconst [-1])) -> (NEG x)
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(MUL _ (MOVDconst [0])) -> (MOVDconst [0])
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(MUL x (MOVDconst [1])) -> x
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x)
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (ADDshiftLL x x [log2(c-1)])
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
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(MUL x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
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(MUL x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
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(MUL x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
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(MUL x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
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(MUL x (MOVDconst [-1])) => (NEG x)
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(MUL _ (MOVDconst [0])) => (MOVDconst [0])
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(MUL x (MOVDconst [1])) => x
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c) => (SLLconst [log2(c)] x)
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 => (ADDshiftLL x x [log2(c-1)])
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(MUL x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 => (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
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(MUL x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) => (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
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(MUL x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) => (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
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(MUL x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) => (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
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(MUL x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) => (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
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(MULW x (MOVDconst [c])) && int32(c)==-1 -> (NEG x)
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(MULW _ (MOVDconst [c])) && int32(c)==0 -> (MOVDconst [0])
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(MULW x (MOVDconst [c])) && int32(c)==1 -> x
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c) -> (SLLconst [log2(c)] x)
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (ADDshiftLL x x [log2(c-1)])
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
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(MULW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
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(MULW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
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(MULW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
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(MULW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
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(MULW x (MOVDconst [c])) && int32(c)==-1 => (NEG x)
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(MULW _ (MOVDconst [c])) && int32(c)==0 => (MOVDconst [0])
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(MULW x (MOVDconst [c])) && int32(c)==1 => x
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c) => (SLLconst [log2(c)] x)
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 => (ADDshiftLL x x [log2(c-1)])
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(MULW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 => (ADDshiftLL (NEG <x.Type> x) x [log2(c+1)])
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(MULW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (SLLconst [log2(c/3)] (ADDshiftLL <x.Type> x x [1]))
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(MULW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (SLLconst [log2(c/5)] (ADDshiftLL <x.Type> x x [2]))
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(MULW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (SLLconst [log2(c/7)] (ADDshiftLL <x.Type> (NEG <x.Type> x) x [3]))
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(MULW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (SLLconst [log2(c/9)] (ADDshiftLL <x.Type> x x [3]))
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// mneg by constant
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(MNEG x (MOVDconst [-1])) -> x
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(MNEG _ (MOVDconst [0])) -> (MOVDconst [0])
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(MNEG x (MOVDconst [1])) -> (NEG x)
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEG x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEG x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEG x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEG x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEG x (MOVDconst [-1])) => x
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(MNEG _ (MOVDconst [0])) => (MOVDconst [0])
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(MNEG x (MOVDconst [1])) => (NEG x)
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c) => (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c-1) && c >= 3 => (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEG x (MOVDconst [c])) && isPowerOfTwo(c+1) && c >= 7 => (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEG x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) => (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEG x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) => (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEG x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) => (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEG x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) => (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEGW x (MOVDconst [c])) && int32(c)==-1 -> x
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(MNEGW _ (MOVDconst [c])) && int32(c)==0 -> (MOVDconst [0])
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(MNEGW x (MOVDconst [c])) && int32(c)==1 -> (NEG x)
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c) -> (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 -> (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 -> (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEGW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEGW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEGW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEGW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MNEGW x (MOVDconst [c])) && int32(c)==-1 => x
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(MNEGW _ (MOVDconst [c])) && int32(c)==0 => (MOVDconst [0])
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(MNEGW x (MOVDconst [c])) && int32(c)==1 => (NEG x)
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c) => (NEG (SLLconst <x.Type> [log2(c)] x))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c) >= 3 => (NEG (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MNEGW x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c) >= 7 => (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [log2(c+1)]))
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(MNEGW x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (SLLconst <x.Type> [log2(c/3)] (SUBshiftLL <x.Type> x x [2]))
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(MNEGW x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (NEG (SLLconst <x.Type> [log2(c/5)] (ADDshiftLL <x.Type> x x [2])))
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(MNEGW x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (SLLconst <x.Type> [log2(c/7)] (SUBshiftLL <x.Type> x x [3]))
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(MNEGW x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (NEG (SLLconst <x.Type> [log2(c/9)] (ADDshiftLL <x.Type> x x [3])))
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(MADD a x (MOVDconst [-1])) -> (SUB a x)
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(MADD a _ (MOVDconst [0])) -> a
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(MADD a x (MOVDconst [1])) -> (ADD a x)
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(MADD a x (MOVDconst [c])) && isPowerOfTwo(c) -> (ADDshiftLL a x [log2(c)])
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(MADD a x (MOVDconst [c])) && isPowerOfTwo(c-1) && c>=3 -> (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
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(MADD a x (MOVDconst [c])) && isPowerOfTwo(c+1) && c>=7 -> (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
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(MADD a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
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(MADD a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
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(MADD a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
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(MADD a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
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(MADD a x (MOVDconst [-1])) => (SUB a x)
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(MADD a _ (MOVDconst [0])) => a
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(MADD a x (MOVDconst [1])) => (ADD a x)
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(MADD a x (MOVDconst [c])) && isPowerOfTwo(c) => (ADDshiftLL a x [log2(c)])
|
||||
(MADD a x (MOVDconst [c])) && isPowerOfTwo(c-1) && c>=3 => (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADD a x (MOVDconst [c])) && isPowerOfTwo(c+1) && c>=7 => (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADD a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADD a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADD a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADD a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MADD a (MOVDconst [-1]) x) -> (SUB a x)
|
||||
(MADD a (MOVDconst [0]) _) -> a
|
||||
(MADD a (MOVDconst [1]) x) -> (ADD a x)
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c) -> (ADDshiftLL a x [log2(c)])
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c>=3 -> (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c>=7 -> (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADD a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADD a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADD a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADD a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MADD a (MOVDconst [-1]) x) => (SUB a x)
|
||||
(MADD a (MOVDconst [0]) _) => a
|
||||
(MADD a (MOVDconst [1]) x) => (ADD a x)
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c) => (ADDshiftLL a x [log2(c)])
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c>=3 => (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADD a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c>=7 => (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADD a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADD a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADD a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADD a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MADDW a x (MOVDconst [c])) && int32(c)==-1 -> (SUB a x)
|
||||
(MADDW a _ (MOVDconst [c])) && int32(c)==0 -> a
|
||||
(MADDW a x (MOVDconst [c])) && int32(c)==1 -> (ADD a x)
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c) -> (ADDshiftLL a x [log2(c)])
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c)>=3 -> (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c)>=7 -> (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADDW a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADDW a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADDW a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADDW a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MADDW a x (MOVDconst [c])) && int32(c)==-1 => (SUB a x)
|
||||
(MADDW a _ (MOVDconst [c])) && int32(c)==0 => a
|
||||
(MADDW a x (MOVDconst [c])) && int32(c)==1 => (ADD a x)
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c) => (ADDshiftLL a x [log2(c)])
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c)>=3 => (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADDW a x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c)>=7 => (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADDW a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADDW a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADDW a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADDW a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MADDW a (MOVDconst [c]) x) && int32(c)==-1 -> (SUB a x)
|
||||
(MADDW a (MOVDconst [c]) _) && int32(c)==0 -> a
|
||||
(MADDW a (MOVDconst [c]) x) && int32(c)==1 -> (ADD a x)
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c) -> (ADDshiftLL a x [log2(c)])
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c)>=3 -> (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c)>=7 -> (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADDW a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MADDW a (MOVDconst [c]) x) && int32(c)==-1 => (SUB a x)
|
||||
(MADDW a (MOVDconst [c]) _) && int32(c)==0 => a
|
||||
(MADDW a (MOVDconst [c]) x) && int32(c)==1 => (ADD a x)
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c) => (ADDshiftLL a x [log2(c)])
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c)>=3 => (ADD a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MADDW a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c)>=7 => (SUB a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MADDW a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MADDW a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MSUB a x (MOVDconst [-1])) -> (ADD a x)
|
||||
(MSUB a _ (MOVDconst [0])) -> a
|
||||
(MSUB a x (MOVDconst [1])) -> (SUB a x)
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c) -> (SUBshiftLL a x [log2(c)])
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c-1) && c>=3 -> (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c+1) && c>=7 -> (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUB a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUB a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUB a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUB a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MSUB a x (MOVDconst [-1])) => (ADD a x)
|
||||
(MSUB a _ (MOVDconst [0])) => a
|
||||
(MSUB a x (MOVDconst [1])) => (SUB a x)
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c) => (SUBshiftLL a x [log2(c)])
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c-1) && c>=3 => (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUB a x (MOVDconst [c])) && isPowerOfTwo(c+1) && c>=7 => (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUB a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUB a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUB a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUB a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MSUB a (MOVDconst [-1]) x) -> (ADD a x)
|
||||
(MSUB a (MOVDconst [0]) _) -> a
|
||||
(MSUB a (MOVDconst [1]) x) -> (SUB a x)
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SUBshiftLL a x [log2(c)])
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c>=3 -> (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c>=7 -> (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUB a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MSUB a (MOVDconst [-1]) x) => (ADD a x)
|
||||
(MSUB a (MOVDconst [0]) _) => a
|
||||
(MSUB a (MOVDconst [1]) x) => (SUB a x)
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c) => (SUBshiftLL a x [log2(c)])
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && c>=3 => (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUB a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && c>=7 => (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUB a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUB a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MSUBW a x (MOVDconst [c])) && int32(c)==-1 -> (ADD a x)
|
||||
(MSUBW a _ (MOVDconst [c])) && int32(c)==0 -> a
|
||||
(MSUBW a x (MOVDconst [c])) && int32(c)==1 -> (SUB a x)
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c) -> (SUBshiftLL a x [log2(c)])
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c)>=3 -> (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c)>=7 -> (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUBW a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MSUBW a x (MOVDconst [c])) && int32(c)==-1 => (ADD a x)
|
||||
(MSUBW a _ (MOVDconst [c])) && int32(c)==0 => a
|
||||
(MSUBW a x (MOVDconst [c])) && int32(c)==1 => (SUB a x)
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c) => (SUBshiftLL a x [log2(c)])
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c-1) && int32(c)>=3 => (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUBW a x (MOVDconst [c])) && isPowerOfTwo(c+1) && int32(c)>=7 => (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUBW a x (MOVDconst [c])) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUBW a x (MOVDconst [c])) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
(MSUBW a (MOVDconst [c]) x) && int32(c)==-1 -> (ADD a x)
|
||||
(MSUBW a (MOVDconst [c]) _) && int32(c)==0 -> a
|
||||
(MSUBW a (MOVDconst [c]) x) && int32(c)==1 -> (SUB a x)
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c) -> (SUBshiftLL a x [log2(c)])
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c)>=3 -> (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c)>=7 -> (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUBW a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) -> (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) -> (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
(MSUBW a (MOVDconst [c]) x) && int32(c)==-1 => (ADD a x)
|
||||
(MSUBW a (MOVDconst [c]) _) && int32(c)==0 => a
|
||||
(MSUBW a (MOVDconst [c]) x) && int32(c)==1 => (SUB a x)
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c) => (SUBshiftLL a x [log2(c)])
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c-1) && int32(c)>=3 => (SUB a (ADDshiftLL <x.Type> x x [log2(c-1)]))
|
||||
(MSUBW a (MOVDconst [c]) x) && isPowerOfTwo(c+1) && int32(c)>=7 => (ADD a (SUBshiftLL <x.Type> x x [log2(c+1)]))
|
||||
(MSUBW a (MOVDconst [c]) x) && c%3 == 0 && isPowerOfTwo(c/3) && is32Bit(c) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [log2(c/3)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%5 == 0 && isPowerOfTwo(c/5) && is32Bit(c) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [log2(c/5)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%7 == 0 && isPowerOfTwo(c/7) && is32Bit(c) => (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [log2(c/7)])
|
||||
(MSUBW a (MOVDconst [c]) x) && c%9 == 0 && isPowerOfTwo(c/9) && is32Bit(c) => (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [log2(c/9)])
|
||||
|
||||
// div by constant
|
||||
(UDIV x (MOVDconst [1])) -> x
|
||||
(UDIV x (MOVDconst [c])) && isPowerOfTwo(c) -> (SRLconst [log2(c)] x)
|
||||
(UDIVW x (MOVDconst [c])) && uint32(c)==1 -> x
|
||||
(UDIVW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (SRLconst [log2(c)] x)
|
||||
(UMOD _ (MOVDconst [1])) -> (MOVDconst [0])
|
||||
(UMOD x (MOVDconst [c])) && isPowerOfTwo(c) -> (ANDconst [c-1] x)
|
||||
(UMODW _ (MOVDconst [c])) && uint32(c)==1 -> (MOVDconst [0])
|
||||
(UMODW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) -> (ANDconst [c-1] x)
|
||||
(UDIV x (MOVDconst [1])) => x
|
||||
(UDIV x (MOVDconst [c])) && isPowerOfTwo(c) => (SRLconst [log2(c)] x)
|
||||
(UDIVW x (MOVDconst [c])) && uint32(c)==1 => x
|
||||
(UDIVW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) => (SRLconst [log2(c)] x)
|
||||
(UMOD _ (MOVDconst [1])) => (MOVDconst [0])
|
||||
(UMOD x (MOVDconst [c])) && isPowerOfTwo(c) => (ANDconst [c-1] x)
|
||||
(UMODW _ (MOVDconst [c])) && uint32(c)==1 => (MOVDconst [0])
|
||||
(UMODW x (MOVDconst [c])) && isPowerOfTwo(c) && is32Bit(c) => (ANDconst [c-1] x)
|
||||
|
||||
// generic simplifications
|
||||
(ADD x (NEG y)) -> (SUB x y)
|
||||
(SUB x x) -> (MOVDconst [0])
|
||||
(AND x x) -> x
|
||||
(OR x x) -> x
|
||||
(XOR x x) -> (MOVDconst [0])
|
||||
(BIC x x) -> (MOVDconst [0])
|
||||
(EON x x) -> (MOVDconst [-1])
|
||||
(ORN x x) -> (MOVDconst [-1])
|
||||
(AND x (MVN y)) -> (BIC x y)
|
||||
(XOR x (MVN y)) -> (EON x y)
|
||||
(OR x (MVN y)) -> (ORN x y)
|
||||
(MVN (XOR x y)) -> (EON x y)
|
||||
(ADD x (NEG y)) => (SUB x y)
|
||||
(SUB x x) => (MOVDconst [0])
|
||||
(AND x x) => x
|
||||
(OR x x) => x
|
||||
(XOR x x) => (MOVDconst [0])
|
||||
(BIC x x) => (MOVDconst [0])
|
||||
(EON x x) => (MOVDconst [-1])
|
||||
(ORN x x) => (MOVDconst [-1])
|
||||
(AND x (MVN y)) => (BIC x y)
|
||||
(XOR x (MVN y)) => (EON x y)
|
||||
(OR x (MVN y)) => (ORN x y)
|
||||
(MVN (XOR x y)) => (EON x y)
|
||||
(CSEL [cc] x (MOVDconst [0]) flag) => (CSEL0 [cc] x flag)
|
||||
(CSEL [cc] (MOVDconst [0]) y flag) => (CSEL0 [arm64Negate(cc)] y flag)
|
||||
(SUB x (SUB y z)) -> (SUB (ADD <v.Type> x z) y)
|
||||
(SUB (SUB x y) z) -> (SUB x (ADD <y.Type> y z))
|
||||
(SUB x (SUB y z)) => (SUB (ADD <v.Type> x z) y)
|
||||
(SUB (SUB x y) z) => (SUB x (ADD <y.Type> y z))
|
||||
|
||||
// remove redundant *const ops
|
||||
(ADDconst [0] x) -> x
|
||||
(SUBconst [0] x) -> x
|
||||
(ANDconst [0] _) -> (MOVDconst [0])
|
||||
(ANDconst [-1] x) -> x
|
||||
(ORconst [0] x) -> x
|
||||
(ORconst [-1] _) -> (MOVDconst [-1])
|
||||
(XORconst [0] x) -> x
|
||||
(XORconst [-1] x) -> (MVN x)
|
||||
(ADDconst [0] x) => x
|
||||
(SUBconst [0] x) => x
|
||||
(ANDconst [0] _) => (MOVDconst [0])
|
||||
(ANDconst [-1] x) => x
|
||||
(ORconst [0] x) => x
|
||||
(ORconst [-1] _) => (MOVDconst [-1])
|
||||
(XORconst [0] x) => x
|
||||
(XORconst [-1] x) => (MVN x)
|
||||
|
||||
// generic constant folding
|
||||
(ADDconst [c] (MOVDconst [d])) -> (MOVDconst [c+d])
|
||||
(ADDconst [c] (ADDconst [d] x)) -> (ADDconst [c+d] x)
|
||||
(ADDconst [c] (SUBconst [d] x)) -> (ADDconst [c-d] x)
|
||||
(SUBconst [c] (MOVDconst [d])) -> (MOVDconst [d-c])
|
||||
(SUBconst [c] (SUBconst [d] x)) -> (ADDconst [-c-d] x)
|
||||
(SUBconst [c] (ADDconst [d] x)) -> (ADDconst [-c+d] x)
|
||||
(SLLconst [c] (MOVDconst [d])) -> (MOVDconst [d<<uint64(c)])
|
||||
(SRLconst [c] (MOVDconst [d])) -> (MOVDconst [int64(uint64(d)>>uint64(c))])
|
||||
(SRAconst [c] (MOVDconst [d])) -> (MOVDconst [d>>uint64(c)])
|
||||
(MUL (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c*d])
|
||||
(MULW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)*int32(d))])
|
||||
(MNEG (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [-c*d])
|
||||
(MNEGW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [-int64(int32(c)*int32(d))])
|
||||
(MADD (MOVDconst [c]) x y) -> (ADDconst [c] (MUL <x.Type> x y))
|
||||
(MADDW (MOVDconst [c]) x y) -> (ADDconst [c] (MULW <x.Type> x y))
|
||||
(MSUB (MOVDconst [c]) x y) -> (ADDconst [c] (MNEG <x.Type> x y))
|
||||
(MSUBW (MOVDconst [c]) x y) -> (ADDconst [c] (MNEGW <x.Type> x y))
|
||||
(MADD a (MOVDconst [c]) (MOVDconst [d])) -> (ADDconst [c*d] a)
|
||||
(MADDW a (MOVDconst [c]) (MOVDconst [d])) -> (ADDconst [int64(int32(c)*int32(d))] a)
|
||||
(MSUB a (MOVDconst [c]) (MOVDconst [d])) -> (SUBconst [c*d] a)
|
||||
(MSUBW a (MOVDconst [c]) (MOVDconst [d])) -> (SUBconst [int64(int32(c)*int32(d))] a)
|
||||
(DIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c/d])
|
||||
(UDIV (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)/uint64(d))])
|
||||
(DIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)/int32(d))])
|
||||
(UDIVW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)/uint32(d))])
|
||||
(MOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [c%d])
|
||||
(UMOD (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint64(c)%uint64(d))])
|
||||
(MODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(int32(c)%int32(d))])
|
||||
(UMODW (MOVDconst [c]) (MOVDconst [d])) -> (MOVDconst [int64(uint32(c)%uint32(d))])
|
||||
(ANDconst [c] (MOVDconst [d])) -> (MOVDconst [c&d])
|
||||
(ANDconst [c] (ANDconst [d] x)) -> (ANDconst [c&d] x)
|
||||
(ANDconst [c] (MOVWUreg x)) -> (ANDconst [c&(1<<32-1)] x)
|
||||
(ANDconst [c] (MOVHUreg x)) -> (ANDconst [c&(1<<16-1)] x)
|
||||
(ANDconst [c] (MOVBUreg x)) -> (ANDconst [c&(1<<8-1)] x)
|
||||
(MOVWUreg (ANDconst [c] x)) -> (ANDconst [c&(1<<32-1)] x)
|
||||
(MOVHUreg (ANDconst [c] x)) -> (ANDconst [c&(1<<16-1)] x)
|
||||
(MOVBUreg (ANDconst [c] x)) -> (ANDconst [c&(1<<8-1)] x)
|
||||
(ORconst [c] (MOVDconst [d])) -> (MOVDconst [c|d])
|
||||
(ORconst [c] (ORconst [d] x)) -> (ORconst [c|d] x)
|
||||
(XORconst [c] (MOVDconst [d])) -> (MOVDconst [c^d])
|
||||
(XORconst [c] (XORconst [d] x)) -> (XORconst [c^d] x)
|
||||
(MVN (MOVDconst [c])) -> (MOVDconst [^c])
|
||||
(NEG (MOVDconst [c])) -> (MOVDconst [-c])
|
||||
(MOVBreg (MOVDconst [c])) -> (MOVDconst [int64(int8(c))])
|
||||
(MOVBUreg (MOVDconst [c])) -> (MOVDconst [int64(uint8(c))])
|
||||
(MOVHreg (MOVDconst [c])) -> (MOVDconst [int64(int16(c))])
|
||||
(MOVHUreg (MOVDconst [c])) -> (MOVDconst [int64(uint16(c))])
|
||||
(MOVWreg (MOVDconst [c])) -> (MOVDconst [int64(int32(c))])
|
||||
(MOVWUreg (MOVDconst [c])) -> (MOVDconst [int64(uint32(c))])
|
||||
(MOVDreg (MOVDconst [c])) -> (MOVDconst [c])
|
||||
(ADDconst [c] (MOVDconst [d])) => (MOVDconst [c+d])
|
||||
(ADDconst [c] (ADDconst [d] x)) => (ADDconst [c+d] x)
|
||||
(ADDconst [c] (SUBconst [d] x)) => (ADDconst [c-d] x)
|
||||
(SUBconst [c] (MOVDconst [d])) => (MOVDconst [d-c])
|
||||
(SUBconst [c] (SUBconst [d] x)) => (ADDconst [-c-d] x)
|
||||
(SUBconst [c] (ADDconst [d] x)) => (ADDconst [-c+d] x)
|
||||
(SLLconst [c] (MOVDconst [d])) => (MOVDconst [d<<uint64(c)])
|
||||
(SRLconst [c] (MOVDconst [d])) => (MOVDconst [int64(uint64(d)>>uint64(c))])
|
||||
(SRAconst [c] (MOVDconst [d])) => (MOVDconst [d>>uint64(c)])
|
||||
(MUL (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c*d])
|
||||
(MULW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(int32(c)*int32(d))])
|
||||
(MNEG (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [-c*d])
|
||||
(MNEGW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [-int64(int32(c)*int32(d))])
|
||||
(MADD (MOVDconst [c]) x y) => (ADDconst [c] (MUL <x.Type> x y))
|
||||
(MADDW (MOVDconst [c]) x y) => (ADDconst [c] (MULW <x.Type> x y))
|
||||
(MSUB (MOVDconst [c]) x y) => (ADDconst [c] (MNEG <x.Type> x y))
|
||||
(MSUBW (MOVDconst [c]) x y) => (ADDconst [c] (MNEGW <x.Type> x y))
|
||||
(MADD a (MOVDconst [c]) (MOVDconst [d])) => (ADDconst [c*d] a)
|
||||
(MADDW a (MOVDconst [c]) (MOVDconst [d])) => (ADDconst [int64(int32(c)*int32(d))] a)
|
||||
(MSUB a (MOVDconst [c]) (MOVDconst [d])) => (SUBconst [c*d] a)
|
||||
(MSUBW a (MOVDconst [c]) (MOVDconst [d])) => (SUBconst [int64(int32(c)*int32(d))] a)
|
||||
(DIV (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c/d])
|
||||
(UDIV (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(uint64(c)/uint64(d))])
|
||||
(DIVW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(int32(c)/int32(d))])
|
||||
(UDIVW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(uint32(c)/uint32(d))])
|
||||
(MOD (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [c%d])
|
||||
(UMOD (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(uint64(c)%uint64(d))])
|
||||
(MODW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(int32(c)%int32(d))])
|
||||
(UMODW (MOVDconst [c]) (MOVDconst [d])) => (MOVDconst [int64(uint32(c)%uint32(d))])
|
||||
(ANDconst [c] (MOVDconst [d])) => (MOVDconst [c&d])
|
||||
(ANDconst [c] (ANDconst [d] x)) => (ANDconst [c&d] x)
|
||||
(ANDconst [c] (MOVWUreg x)) => (ANDconst [c&(1<<32-1)] x)
|
||||
(ANDconst [c] (MOVHUreg x)) => (ANDconst [c&(1<<16-1)] x)
|
||||
(ANDconst [c] (MOVBUreg x)) => (ANDconst [c&(1<<8-1)] x)
|
||||
(MOVWUreg (ANDconst [c] x)) => (ANDconst [c&(1<<32-1)] x)
|
||||
(MOVHUreg (ANDconst [c] x)) => (ANDconst [c&(1<<16-1)] x)
|
||||
(MOVBUreg (ANDconst [c] x)) => (ANDconst [c&(1<<8-1)] x)
|
||||
(ORconst [c] (MOVDconst [d])) => (MOVDconst [c|d])
|
||||
(ORconst [c] (ORconst [d] x)) => (ORconst [c|d] x)
|
||||
(XORconst [c] (MOVDconst [d])) => (MOVDconst [c^d])
|
||||
(XORconst [c] (XORconst [d] x)) => (XORconst [c^d] x)
|
||||
(MVN (MOVDconst [c])) => (MOVDconst [^c])
|
||||
(NEG (MOVDconst [c])) => (MOVDconst [-c])
|
||||
(MOVBreg (MOVDconst [c])) => (MOVDconst [int64(int8(c))])
|
||||
(MOVBUreg (MOVDconst [c])) => (MOVDconst [int64(uint8(c))])
|
||||
(MOVHreg (MOVDconst [c])) => (MOVDconst [int64(int16(c))])
|
||||
(MOVHUreg (MOVDconst [c])) => (MOVDconst [int64(uint16(c))])
|
||||
(MOVWreg (MOVDconst [c])) => (MOVDconst [int64(int32(c))])
|
||||
(MOVWUreg (MOVDconst [c])) => (MOVDconst [int64(uint32(c))])
|
||||
(MOVDreg (MOVDconst [c])) => (MOVDconst [c])
|
||||
|
||||
// constant comparisons
|
||||
(CMPconst (MOVDconst [x]) [y]) => (FlagConstant [subFlags64(x,y)])
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
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Reference in New Issue