mirror of https://github.com/golang/go.git
cmd/compile: check out-of-range shifts on ARM and ARM64
When encoding ARM or ARM64 shifted register operand, check that the shift is in range. Change-Id: If0014933bfd0a1b8eaaa01e0220a6eeb17ab9f40 Reviewed-on: https://go-review.googlesource.com/c/go/+/351530 Trust: Cherry Mui <cherryyz@google.com> Run-TryBot: Cherry Mui <cherryyz@google.com> TryBot-Result: Go Bot <gobot@golang.org> Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
Cherry Mui
parent
635e49388b
commit
ccfc41eee0
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@ -88,15 +88,18 @@ func (v shift) String() string {
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}
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// makeshift encodes a register shifted by a constant
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func makeshift(reg int16, typ int64, s int64) shift {
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func makeshift(v *ssa.Value, reg int16, typ int64, s int64) shift {
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if s < 0 || s >= 32 {
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v.Fatalf("shift out of range: %d", s)
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}
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return shift(int64(reg&0xf) | typ | (s&31)<<7)
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}
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// genshift generates a Prog for r = r0 op (r1 shifted by n)
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func genshift(s *ssagen.State, as obj.As, r0, r1, r int16, typ int64, n int64) *obj.Prog {
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func genshift(s *ssagen.State, v *ssa.Value, as obj.As, r0, r1, r int16, typ int64, n int64) *obj.Prog {
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p := s.Prog(as)
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p.From.Type = obj.TYPE_SHIFT
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p.From.Offset = int64(makeshift(r1, typ, n))
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p.From.Offset = int64(makeshift(v, r1, typ, n))
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p.Reg = r0
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if r != 0 {
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p.To.Type = obj.TYPE_REG
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@ -335,7 +338,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg0()
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case ssa.OpARMSRRconst:
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genshift(s, arm.AMOVW, 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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genshift(s, v, arm.AMOVW, 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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case ssa.OpARMADDshiftLL,
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ssa.OpARMADCshiftLL,
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ssa.OpARMSUBshiftLL,
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@ -346,11 +349,11 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARMORshiftLL,
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ssa.OpARMXORshiftLL,
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ssa.OpARMBICshiftLL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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case ssa.OpARMADDSshiftLL,
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ssa.OpARMSUBSshiftLL,
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ssa.OpARMRSBSshiftLL:
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LL, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LL, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRL,
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ssa.OpARMADCshiftRL,
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@ -362,11 +365,11 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARMORshiftRL,
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ssa.OpARMXORshiftRL,
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ssa.OpARMBICshiftRL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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case ssa.OpARMADDSshiftRL,
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ssa.OpARMSUBSshiftRL,
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ssa.OpARMRSBSshiftRL:
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LR, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_LR, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMADDshiftRA,
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ssa.OpARMADCshiftRA,
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@ -378,20 +381,20 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARMORshiftRA,
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ssa.OpARMXORshiftRA,
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ssa.OpARMBICshiftRA:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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case ssa.OpARMADDSshiftRA,
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ssa.OpARMSUBSshiftRA,
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ssa.OpARMRSBSshiftRA:
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p := genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_AR, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg0(), arm.SHIFT_AR, v.AuxInt)
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p.Scond = arm.C_SBIT
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case ssa.OpARMXORshiftRR:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_RR, v.AuxInt)
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case ssa.OpARMMVNshiftLL:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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case ssa.OpARMMVNshiftRL:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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case ssa.OpARMMVNshiftRA:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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case ssa.OpARMMVNshiftLLreg:
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genregshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL)
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case ssa.OpARMMVNshiftRLreg:
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@ -513,11 +516,11 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[0].Reg()
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case ssa.OpARMCMPshiftLL, ssa.OpARMCMNshiftLL, ssa.OpARMTSTshiftLL, ssa.OpARMTEQshiftLL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LL, v.AuxInt)
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case ssa.OpARMCMPshiftRL, ssa.OpARMCMNshiftRL, ssa.OpARMTSTshiftRL, ssa.OpARMTEQshiftRL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_LR, v.AuxInt)
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case ssa.OpARMCMPshiftRA, ssa.OpARMCMNshiftRA, ssa.OpARMTSTshiftRA, ssa.OpARMTEQshiftRA:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm.SHIFT_AR, v.AuxInt)
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case ssa.OpARMCMPshiftLLreg, ssa.OpARMCMNshiftLLreg, ssa.OpARMTSTshiftLLreg, ssa.OpARMTEQshiftLLreg:
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genregshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Args[2].Reg(), 0, arm.SHIFT_LL)
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case ssa.OpARMCMPshiftRLreg, ssa.OpARMCMNshiftRLreg, ssa.OpARMTSTshiftRLreg, ssa.OpARMTEQshiftRLreg:
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@ -583,13 +586,13 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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// this is just shift 0 bits
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fallthrough
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case ssa.OpARMMOVWloadshiftLL:
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p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LL, v.AuxInt)
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p.From.Reg = v.Args[0].Reg()
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case ssa.OpARMMOVWloadshiftRL:
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p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_LR, v.AuxInt)
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p.From.Reg = v.Args[0].Reg()
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case ssa.OpARMMOVWloadshiftRA:
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p := genshift(s, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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p := genshift(s, v, v.Op.Asm(), 0, v.Args[1].Reg(), v.Reg(), arm.SHIFT_AR, v.AuxInt)
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p.From.Reg = v.Args[0].Reg()
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case ssa.OpARMMOVWstoreidx, ssa.OpARMMOVBstoreidx, ssa.OpARMMOVHstoreidx:
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// this is just shift 0 bits
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@ -600,21 +603,21 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Reg = v.Args[2].Reg()
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p.To.Type = obj.TYPE_SHIFT
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p.To.Reg = v.Args[0].Reg()
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p.To.Offset = int64(makeshift(v.Args[1].Reg(), arm.SHIFT_LL, v.AuxInt))
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p.To.Offset = int64(makeshift(v, v.Args[1].Reg(), arm.SHIFT_LL, v.AuxInt))
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case ssa.OpARMMOVWstoreshiftRL:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[2].Reg()
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p.To.Type = obj.TYPE_SHIFT
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p.To.Reg = v.Args[0].Reg()
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p.To.Offset = int64(makeshift(v.Args[1].Reg(), arm.SHIFT_LR, v.AuxInt))
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p.To.Offset = int64(makeshift(v, v.Args[1].Reg(), arm.SHIFT_LR, v.AuxInt))
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case ssa.OpARMMOVWstoreshiftRA:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_REG
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p.From.Reg = v.Args[2].Reg()
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p.To.Type = obj.TYPE_SHIFT
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p.To.Reg = v.Args[0].Reg()
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p.To.Offset = int64(makeshift(v.Args[1].Reg(), arm.SHIFT_AR, v.AuxInt))
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p.To.Offset = int64(makeshift(v, v.Args[1].Reg(), arm.SHIFT_AR, v.AuxInt))
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case ssa.OpARMMOVBreg,
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ssa.OpARMMOVBUreg,
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ssa.OpARMMOVHreg,
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@ -645,7 +648,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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}
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if buildcfg.GOARM >= 6 {
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// generate more efficient "MOVB/MOVBU/MOVH/MOVHU Reg@>0, Reg" on ARMv6 & ARMv7
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, 0)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm.SHIFT_RR, 0)
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return
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}
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fallthrough
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@ -79,15 +79,18 @@ func storeByType(t *types.Type) obj.As {
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}
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// makeshift encodes a register shifted by a constant, used as an Offset in Prog
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func makeshift(reg int16, typ int64, s int64) int64 {
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func makeshift(v *ssa.Value, reg int16, typ int64, s int64) int64 {
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if s < 0 || s >= 64 {
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v.Fatalf("shift out of range: %d", s)
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}
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return int64(reg&31)<<16 | typ | (s&63)<<10
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}
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// genshift generates a Prog for r = r0 op (r1 shifted by n)
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func genshift(s *ssagen.State, as obj.As, r0, r1, r int16, typ int64, n int64) *obj.Prog {
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func genshift(s *ssagen.State, v *ssa.Value, as obj.As, r0, r1, r int16, typ int64, n int64) *obj.Prog {
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p := s.Prog(as)
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p.From.Type = obj.TYPE_SHIFT
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p.From.Offset = makeshift(r1, typ, n)
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p.From.Offset = makeshift(v, r1, typ, n)
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p.Reg = r0
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if r != 0 {
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p.To.Type = obj.TYPE_REG
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@ -310,13 +313,13 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.To.Type = obj.TYPE_REG
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p.To.Reg = v.Reg()
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case ssa.OpARM64MVNshiftLL, ssa.OpARM64NEGshiftLL:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_LL, v.AuxInt)
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case ssa.OpARM64MVNshiftRL, ssa.OpARM64NEGshiftRL:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_LR, v.AuxInt)
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case ssa.OpARM64MVNshiftRA, ssa.OpARM64NEGshiftRA:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_AR, v.AuxInt)
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case ssa.OpARM64MVNshiftRO:
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genshift(s, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_ROR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), 0, v.Args[0].Reg(), v.Reg(), arm64.SHIFT_ROR, v.AuxInt)
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case ssa.OpARM64ADDshiftLL,
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ssa.OpARM64SUBshiftLL,
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ssa.OpARM64ANDshiftLL,
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@ -325,7 +328,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARM64EONshiftLL,
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ssa.OpARM64ORNshiftLL,
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ssa.OpARM64BICshiftLL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_LL, v.AuxInt)
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case ssa.OpARM64ADDshiftRL,
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ssa.OpARM64SUBshiftRL,
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ssa.OpARM64ANDshiftRL,
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@ -334,7 +337,7 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARM64EONshiftRL,
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ssa.OpARM64ORNshiftRL,
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ssa.OpARM64BICshiftRL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_LR, v.AuxInt)
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case ssa.OpARM64ADDshiftRA,
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ssa.OpARM64SUBshiftRA,
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ssa.OpARM64ANDshiftRA,
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@ -343,14 +346,14 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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ssa.OpARM64EONshiftRA,
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ssa.OpARM64ORNshiftRA,
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ssa.OpARM64BICshiftRA:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_AR, v.AuxInt)
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case ssa.OpARM64ANDshiftRO,
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ssa.OpARM64ORshiftRO,
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ssa.OpARM64XORshiftRO,
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ssa.OpARM64EONshiftRO,
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ssa.OpARM64ORNshiftRO,
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ssa.OpARM64BICshiftRO:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_ROR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), v.Reg(), arm64.SHIFT_ROR, v.AuxInt)
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case ssa.OpARM64MOVDconst:
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p := s.Prog(v.Op.Asm())
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p.From.Type = obj.TYPE_CONST
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@ -393,13 +396,13 @@ func ssaGenValue(s *ssagen.State, v *ssa.Value) {
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p.From.Offset = v.AuxInt
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p.Reg = v.Args[0].Reg()
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case ssa.OpARM64CMPshiftLL, ssa.OpARM64CMNshiftLL, ssa.OpARM64TSTshiftLL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_LL, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_LL, v.AuxInt)
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case ssa.OpARM64CMPshiftRL, ssa.OpARM64CMNshiftRL, ssa.OpARM64TSTshiftRL:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_LR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_LR, v.AuxInt)
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case ssa.OpARM64CMPshiftRA, ssa.OpARM64CMNshiftRA, ssa.OpARM64TSTshiftRA:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_AR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_AR, v.AuxInt)
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case ssa.OpARM64TSTshiftRO:
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genshift(s, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_ROR, v.AuxInt)
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genshift(s, v, v.Op.Asm(), v.Args[0].Reg(), v.Args[1].Reg(), 0, arm64.SHIFT_ROR, v.AuxInt)
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case ssa.OpARM64MOVDaddr:
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p := s.Prog(arm64.AMOVD)
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p.From.Type = obj.TYPE_ADDR
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