mirror of https://github.com/golang/go.git
cmd/internal/obj/arm64: optimize function prologue/epilogue with STP/LDP
In function prologue and epilogue, we save and restore FP and LR
registers, and adjust RSP. The current instruction sequence is as
follow.
For frame size <= 240B,
prologue:
MOVD.W R30, -offset(RSP)
MOVD R29, -8(RSP)
epilogue:
MOVD -8(RSP), R29
MOVD.P offset(RSP), R30
For frame size > 240B,
prologue:
SUB $offset, RSP, R27
MOVD R30, (R27)
MOVD R27, RSP
MOVD R29, -8(RSP)
epilogue:
MOVD -8(RSP), R29
MOVD (RSP), R30
ADD $offset, RSP
Each sequence uses two load or store instructions, actually we can load
or store two registers with one LDP or STP instruction. This CL changes
the sequences as follow.
For frame size <= 496B,
prologue:
STP (R29, R30), -(offset+8)(RSP)
SUB $offset, RSP, RSP
epilogue:
LDP -8(RSP), (R29, R30)
ADD $offset, RSP, RSP
For frame size > 496B,
prologue:
SUB $offset, RSP, R20
STP (R29, R30), -8(R20)
MOVD R20, RSP
epilogue:
LDP -8(RSP), (R29, R30)
ADD $offset, RSP, RSP
Change-Id: Ia58af85fc81cce9b7c393dc38df43bffb203baad
Reviewed-on: https://go-review.googlesource.com/c/go/+/379075
Reviewed-by: Cherry Mui <cherryyz@google.com>
Trust: Eric Fang <eric.fang@arm.com>
Run-TryBot: Eric Fang <eric.fang@arm.com>
This commit is contained in:
eric fang
Eric Fang
parent
1045faa38c
commit
c6d9b38dd8
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@ -622,92 +622,124 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
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var prologueEnd *obj.Prog
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var prologueEnd *obj.Prog
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aoffset := c.autosize
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aoffset := c.autosize
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if aoffset > 0xF0 {
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if aoffset > 0x1f0 {
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aoffset = 0xF0
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// LDP offset variant range is -512 to 504, SP should be 16-byte aligned,
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// so the maximum aoffset value is 496.
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aoffset = 0x1f0
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}
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}
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// Frame is non-empty. Make sure to save link register, even if
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// Frame is non-empty. Make sure to save link register, even if
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// it is a leaf function, so that traceback works.
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// it is a leaf function, so that traceback works.
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q = p
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q = p
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if c.autosize > aoffset {
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if c.autosize > aoffset {
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// Frame size is too large for a MOVD.W instruction.
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// Frame size is too large for a STP instruction. Store the frame pointer
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// Store link register before decrementing SP, so if a signal comes
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// register and link register before decrementing SP, so if a signal comes
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// during the execution of the function prologue, the traceback
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// during the execution of the function prologue, the traceback code will
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// code will not see a half-updated stack frame.
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// not see a half-updated stack frame.
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// This sequence is not async preemptible, as if we open a frame
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// at the current SP, it will clobber the saved LR.
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q = c.ctxt.StartUnsafePoint(q, c.newprog)
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q = obj.Appendp(q, c.newprog)
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q.Pos = p.Pos
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q.As = ASUB
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q.From.Type = obj.TYPE_CONST
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q.From.Offset = int64(c.autosize)
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q.Reg = REGSP
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q.To.Type = obj.TYPE_REG
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q.To.Reg = REGTMP
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prologueEnd = q
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q = obj.Appendp(q, c.newprog)
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q.Pos = p.Pos
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q.As = AMOVD
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q.From.Type = obj.TYPE_REG
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q.From.Reg = REGLINK
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q.To.Type = obj.TYPE_MEM
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q.To.Reg = REGTMP
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// SUB $autosize, RSP, R20
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q1 = obj.Appendp(q, c.newprog)
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q1 = obj.Appendp(q, c.newprog)
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q1.Pos = p.Pos
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q1.Pos = p.Pos
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q1.As = ASUB
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q1.From.Type = obj.TYPE_CONST
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q1.From.Offset = int64(c.autosize)
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q1.Reg = REGSP
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q1.To.Type = obj.TYPE_REG
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q1.To.Reg = REG_R20
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prologueEnd = q1
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// STP (R29, R30), -8(R20)
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.As = ASTP
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q1.From.Type = obj.TYPE_REGREG
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q1.From.Reg = REGFP
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q1.From.Offset = REGLINK
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q1.To.Type = obj.TYPE_MEM
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q1.To.Reg = REG_R20
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q1.To.Offset = -8
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// This is not async preemptible, as if we open a frame
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// at the current SP, it will clobber the saved LR.
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q1 = c.ctxt.StartUnsafePoint(q1, c.newprog)
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// MOVD R20, RSP
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.As = AMOVD
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q1.As = AMOVD
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q1.From.Type = obj.TYPE_REG
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q1.From.Type = obj.TYPE_REG
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q1.From.Reg = REGTMP
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q1.From.Reg = REG_R20
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q1.To.Type = obj.TYPE_REG
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q1.To.Type = obj.TYPE_REG
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q1.To.Reg = REGSP
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q1.To.Reg = REGSP
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q1.Spadj = c.autosize
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q1.Spadj = c.autosize
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q1 = c.ctxt.EndUnsafePoint(q1, c.newprog, -1)
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if buildcfg.GOOS == "ios" {
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if buildcfg.GOOS == "ios" {
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// iOS does not support SA_ONSTACK. We will run the signal handler
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// iOS does not support SA_ONSTACK. We will run the signal handler
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// on the G stack. If we write below SP, it may be clobbered by
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// on the G stack. If we write below SP, it may be clobbered by
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// the signal handler. So we save LR after decrementing SP.
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// the signal handler. So we save FP and LR after decrementing SP.
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// STP (R29, R30), -8(RSP)
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q1 = obj.Appendp(q1, c.newprog)
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.Pos = p.Pos
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q1.As = AMOVD
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q1.As = ASTP
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q1.From.Type = obj.TYPE_REG
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q1.From.Type = obj.TYPE_REGREG
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q1.From.Reg = REGLINK
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q1.From.Reg = REGFP
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q1.From.Offset = REGLINK
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q1.To.Type = obj.TYPE_MEM
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q1.To.Type = obj.TYPE_MEM
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q1.To.Reg = REGSP
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q1.To.Reg = REGSP
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q1.To.Offset = -8
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}
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}
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q1 = c.ctxt.EndUnsafePoint(q1, c.newprog, -1)
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} else {
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} else {
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// small frame, update SP and save LR in a single MOVD.W instruction
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// small frame, save FP and LR with one STP instruction, then update SP.
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// Store first, so if a signal comes during the execution of the function
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// prologue, the traceback code will not see a half-updated stack frame.
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// STP (R29, R30), -aoffset-8(RSP)
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q1 = obj.Appendp(q, c.newprog)
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q1 = obj.Appendp(q, c.newprog)
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q1.As = AMOVD
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q1.As = ASTP
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q1.Pos = p.Pos
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q1.Pos = p.Pos
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q1.From.Type = obj.TYPE_REG
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q1.From.Type = obj.TYPE_REGREG
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q1.From.Reg = REGLINK
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q1.From.Reg = REGFP
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q1.From.Offset = REGLINK
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q1.To.Type = obj.TYPE_MEM
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q1.To.Type = obj.TYPE_MEM
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q1.Scond = C_XPRE
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q1.To.Offset = int64(-aoffset - 8)
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q1.To.Offset = int64(-aoffset)
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q1.To.Reg = REGSP
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prologueEnd = q1
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q1 = c.ctxt.StartUnsafePoint(q1, c.newprog)
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// This instruction is not async preemptible, see the above comment.
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// SUB $aoffset, RSP, RSP
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.As = ASUB
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q1.From.Type = obj.TYPE_CONST
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q1.From.Offset = int64(aoffset)
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q1.Reg = REGSP
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q1.To.Type = obj.TYPE_REG
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q1.To.Reg = REGSP
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q1.To.Reg = REGSP
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q1.Spadj = aoffset
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q1.Spadj = aoffset
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prologueEnd = q1
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q1 = c.ctxt.EndUnsafePoint(q1, c.newprog, -1)
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if buildcfg.GOOS == "ios" {
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// See the above comment.
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// STP (R29, R30), -8(RSP)
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q1 = obj.Appendp(q1, c.newprog)
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q1.As = ASTP
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q1.Pos = p.Pos
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q1.From.Type = obj.TYPE_REGREG
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q1.From.Reg = REGFP
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q1.From.Offset = REGLINK
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q1.To.Type = obj.TYPE_MEM
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q1.To.Offset = int64(-8)
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q1.To.Reg = REGSP
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}
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}
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}
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prologueEnd.Pos = prologueEnd.Pos.WithXlogue(src.PosPrologueEnd)
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prologueEnd.Pos = prologueEnd.Pos.WithXlogue(src.PosPrologueEnd)
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// Frame pointer.
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.As = AMOVD
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q1.From.Type = obj.TYPE_REG
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q1.From.Reg = REGFP
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q1.To.Type = obj.TYPE_MEM
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q1.To.Reg = REGSP
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q1.To.Offset = -8
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q1 = obj.Appendp(q1, c.newprog)
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q1 = obj.Appendp(q1, c.newprog)
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q1.Pos = p.Pos
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q1.Pos = p.Pos
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q1.As = ASUB
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q1.As = ASUB
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@ -850,48 +882,28 @@ func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
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p.To.Reg = REGFP
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p.To.Reg = REGFP
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}
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}
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} else {
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} else {
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/* want write-back pre-indexed SP+autosize -> SP, loading REGLINK*/
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// Frame pointer.
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p.As = AMOVD
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p.From.Type = obj.TYPE_MEM
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p.From.Reg = REGSP
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p.From.Offset = -8
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p.To.Type = obj.TYPE_REG
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p.To.Reg = REGFP
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p = obj.Appendp(p, c.newprog)
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aoffset := c.autosize
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aoffset := c.autosize
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// LDP -8(RSP), (R29, R30)
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p.As = ALDP
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p.From.Type = obj.TYPE_MEM
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p.From.Offset = -8
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p.From.Reg = REGSP
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p.To.Type = obj.TYPE_REGREG
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p.To.Reg = REGFP
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p.To.Offset = REGLINK
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if aoffset <= 0xF0 {
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// ADD $aoffset, RSP, RSP
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p.As = AMOVD
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q = newprog()
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p.From.Type = obj.TYPE_MEM
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q.As = AADD
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p.Scond = C_XPOST
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q.From.Type = obj.TYPE_CONST
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p.From.Offset = int64(aoffset)
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q.From.Offset = int64(aoffset)
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p.From.Reg = REGSP
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q.To.Type = obj.TYPE_REG
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p.To.Type = obj.TYPE_REG
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q.To.Reg = REGSP
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p.To.Reg = REGLINK
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q.Spadj = -aoffset
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p.Spadj = -aoffset
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q.Pos = p.Pos
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} else {
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q.Link = p.Link
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p.As = AMOVD
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p.Link = q
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p.From.Type = obj.TYPE_MEM
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p = q
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p.From.Offset = 0
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p.From.Reg = REGSP
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p.To.Type = obj.TYPE_REG
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p.To.Reg = REGLINK
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q = newprog()
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q.As = AADD
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q.From.Type = obj.TYPE_CONST
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q.From.Offset = int64(aoffset)
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q.To.Type = obj.TYPE_REG
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q.To.Reg = REGSP
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q.Link = p.Link
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q.Spadj = int32(-q.From.Offset)
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q.Pos = p.Pos
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p.Link = q
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p = q
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}
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}
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}
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// If enabled, this code emits 'MOV PC, R27' before every 'MOV LR, PC',
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// If enabled, this code emits 'MOV PC, R27' before every 'MOV LR, PC',
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