mirror of https://github.com/golang/go.git
cmd: delete old[5689]a
These are the old assemblers written in C, and now they are not needed. Fixes #10510. Change-Id: Id9337ffc8eccfd93c84b2e23f427fb1a576b543d Reviewed-on: https://go-review.googlesource.com/12784 Reviewed-by: Russ Cox <rsc@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
Rob Pike
parent
6c08213dc0
commit
ba0c142d32
|
|
@ -36,7 +36,6 @@ var bootstrapDirs = []string{
|
|||
"compile/internal/gc",
|
||||
"compile/internal/ppc64",
|
||||
"compile/internal/x86",
|
||||
"internal/asm",
|
||||
"internal/gcprog",
|
||||
"internal/obj",
|
||||
"internal/obj/arm",
|
||||
|
|
@ -50,10 +49,6 @@ var bootstrapDirs = []string{
|
|||
"link/internal/ld",
|
||||
"link/internal/ppc64",
|
||||
"link/internal/x86",
|
||||
"old5a",
|
||||
"old6a",
|
||||
"old8a",
|
||||
"old9a",
|
||||
}
|
||||
|
||||
func bootstrapBuildTools() {
|
||||
|
|
|
|||
|
|
@ -2180,11 +2180,6 @@ func (gcToolchain) gc(b *builder, p *Package, archive, obj string, asmhdr bool,
|
|||
return ofile, output, err
|
||||
}
|
||||
|
||||
// verifyAsm specifies whether to check the assemblers written in Go
|
||||
// against the assemblers written in C. If set, asm will run both asm and (say) 6a
|
||||
// and fail if the two produce different output files.
|
||||
const verifyAsm = true
|
||||
|
||||
func (gcToolchain) asm(b *builder, p *Package, obj, ofile, sfile string) error {
|
||||
// Add -I pkg/GOOS_GOARCH so #include "textflag.h" works in .s files.
|
||||
inc := filepath.Join(goroot, "pkg", "include")
|
||||
|
|
@ -2193,31 +2188,12 @@ func (gcToolchain) asm(b *builder, p *Package, obj, ofile, sfile string) error {
|
|||
if err := b.run(p.Dir, p.ImportPath, nil, args...); err != nil {
|
||||
return err
|
||||
}
|
||||
// Disable checks when additional flags are passed, as the old assemblers
|
||||
// don't implement some of them (e.g., -shared).
|
||||
if verifyAsm && len(buildAsmflags) == 0 {
|
||||
old := ""
|
||||
switch goarch {
|
||||
case "arm":
|
||||
old = "old5a"
|
||||
case "amd64", "amd64p32":
|
||||
old = "old6a"
|
||||
case "386":
|
||||
old = "old8a"
|
||||
case "ppc64", "ppc64le":
|
||||
old = "old9a"
|
||||
}
|
||||
if old != "" {
|
||||
if err := toolVerify(b, p, old, ofile, args); err != nil {
|
||||
return err
|
||||
}
|
||||
}
|
||||
}
|
||||
return nil
|
||||
}
|
||||
|
||||
// toolVerify checks that the command line args writes the same output file
|
||||
// if run using newTool instead.
|
||||
// Unused now but kept around for future use.
|
||||
func toolVerify(b *builder, p *Package, newTool string, ofile string, args []interface{}) error {
|
||||
newArgs := make([]interface{}, len(args))
|
||||
copy(newArgs, args)
|
||||
|
|
|
|||
|
|
@ -646,10 +646,6 @@ var goTools = map[string]targetDir{
|
|||
"cmd/newlink": toTool,
|
||||
"cmd/nm": toTool,
|
||||
"cmd/objdump": toTool,
|
||||
"cmd/old5a": toTool,
|
||||
"cmd/old6a": toTool,
|
||||
"cmd/old8a": toTool,
|
||||
"cmd/old9a": toTool,
|
||||
"cmd/pack": toTool,
|
||||
"cmd/pprof": toTool,
|
||||
"cmd/trace": toTool,
|
||||
|
|
|
|||
|
|
@ -1,804 +0,0 @@
|
|||
// Inferno utils/5a/a.y
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/5a/a.y
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
%{
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
. "cmd/internal/obj/arm"
|
||||
)
|
||||
%}
|
||||
|
||||
%union {
|
||||
sym *asm.Sym
|
||||
lval int32
|
||||
dval float64
|
||||
sval string
|
||||
addr obj.Addr
|
||||
}
|
||||
|
||||
%left '|'
|
||||
%left '^'
|
||||
%left '&'
|
||||
%left '<' '>'
|
||||
%left '+' '-'
|
||||
%left '*' '/' '%'
|
||||
%token <lval> LTYPE1 LTYPE2 LTYPE3 LTYPE4 LTYPE5
|
||||
%token <lval> LTYPE6 LTYPE7 LTYPE8 LTYPE9 LTYPEA
|
||||
%token <lval> LTYPEB LTYPEC LTYPED LTYPEE
|
||||
%token <lval> LTYPEG LTYPEH LTYPEI LTYPEJ LTYPEK
|
||||
%token <lval> LTYPEL LTYPEM LTYPEN LTYPEBX LTYPEPLD
|
||||
%token <lval> LCONST LSP LSB LFP LPC
|
||||
%token <lval> LTYPEX LTYPEPC LTYPEF LR LREG LF LFREG LC LCREG LPSR LFCR
|
||||
%token <lval> LCOND LS LAT LGLOBL
|
||||
%token <dval> LFCONST
|
||||
%token <sval> LSCONST
|
||||
%token <sym> LNAME LLAB LVAR
|
||||
%type <lval> con expr oexpr pointer offset sreg spreg creg
|
||||
%type <lval> rcon cond reglist
|
||||
%type <addr> gen rel reg regreg freg shift fcon frcon textsize
|
||||
%type <addr> imm ximm name oreg ireg nireg ioreg imsr
|
||||
%%
|
||||
prog:
|
||||
| prog
|
||||
{
|
||||
stmtline = asm.Lineno;
|
||||
}
|
||||
line
|
||||
|
||||
line:
|
||||
LNAME ':'
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
if $1.Type == LLAB && $1.Value != int64(asm.PC) {
|
||||
yyerror("redeclaration of %s", $1.Labelname)
|
||||
}
|
||||
$1.Type = LLAB;
|
||||
$1.Value = int64(asm.PC)
|
||||
}
|
||||
line
|
||||
| LNAME '=' expr ';'
|
||||
{
|
||||
$1.Type = LVAR;
|
||||
$1.Value = int64($3);
|
||||
}
|
||||
| LVAR '=' expr ';'
|
||||
{
|
||||
if $1.Value != int64($3) {
|
||||
yyerror("redeclaration of %s", $1.Name)
|
||||
}
|
||||
$1.Value = int64($3);
|
||||
}
|
||||
| ';'
|
||||
| inst ';'
|
||||
| error ';'
|
||||
|
||||
inst:
|
||||
/*
|
||||
* ADD
|
||||
*/
|
||||
LTYPE1 cond imsr ',' spreg ',' reg
|
||||
{
|
||||
outcode($1, $2, &$3, $5, &$7);
|
||||
}
|
||||
| LTYPE1 cond imsr ',' spreg ','
|
||||
{
|
||||
outcode($1, $2, &$3, $5, &nullgen);
|
||||
}
|
||||
| LTYPE1 cond imsr ',' reg
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &$5);
|
||||
}
|
||||
/*
|
||||
* MVN
|
||||
*/
|
||||
| LTYPE2 cond imsr ',' reg
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &$5);
|
||||
}
|
||||
/*
|
||||
* MOVW
|
||||
*/
|
||||
| LTYPE3 cond gen ',' gen
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &$5);
|
||||
}
|
||||
/*
|
||||
* B/BL
|
||||
*/
|
||||
| LTYPE4 cond comma rel
|
||||
{
|
||||
outcode($1, $2, &nullgen, 0, &$4);
|
||||
}
|
||||
| LTYPE4 cond comma nireg
|
||||
{
|
||||
outcode($1, $2, &nullgen, 0, &$4);
|
||||
}
|
||||
/*
|
||||
* BX
|
||||
*/
|
||||
| LTYPEBX comma ireg
|
||||
{
|
||||
outcode($1, Always, &nullgen, 0, &$3);
|
||||
}
|
||||
/*
|
||||
* BEQ
|
||||
*/
|
||||
| LTYPE5 comma rel
|
||||
{
|
||||
outcode($1, Always, &nullgen, 0, &$3);
|
||||
}
|
||||
/*
|
||||
* SWI
|
||||
*/
|
||||
| LTYPE6 cond comma gen
|
||||
{
|
||||
outcode($1, $2, &nullgen, 0, &$4);
|
||||
}
|
||||
/*
|
||||
* CMP
|
||||
*/
|
||||
| LTYPE7 cond imsr ',' spreg comma
|
||||
{
|
||||
outcode($1, $2, &$3, $5, &nullgen);
|
||||
}
|
||||
/*
|
||||
* MOVM
|
||||
*/
|
||||
| LTYPE8 cond ioreg ',' '[' reglist ']'
|
||||
{
|
||||
var g obj.Addr
|
||||
|
||||
g = nullgen;
|
||||
g.Type = obj.TYPE_REGLIST;
|
||||
g.Offset = int64($6);
|
||||
outcode($1, $2, &$3, 0, &g);
|
||||
}
|
||||
| LTYPE8 cond '[' reglist ']' ',' ioreg
|
||||
{
|
||||
var g obj.Addr
|
||||
|
||||
g = nullgen;
|
||||
g.Type = obj.TYPE_REGLIST;
|
||||
g.Offset = int64($4);
|
||||
outcode($1, $2, &g, 0, &$7);
|
||||
}
|
||||
/*
|
||||
* SWAP
|
||||
*/
|
||||
| LTYPE9 cond reg ',' ireg ',' reg
|
||||
{
|
||||
outcode($1, $2, &$5, int32($3.Reg), &$7);
|
||||
}
|
||||
| LTYPE9 cond reg ',' ireg comma
|
||||
{
|
||||
outcode($1, $2, &$5, int32($3.Reg), &$3);
|
||||
}
|
||||
| LTYPE9 cond comma ireg ',' reg
|
||||
{
|
||||
outcode($1, $2, &$4, int32($6.Reg), &$6);
|
||||
}
|
||||
/*
|
||||
* RET
|
||||
*/
|
||||
| LTYPEA cond comma
|
||||
{
|
||||
outcode($1, $2, &nullgen, 0, &nullgen);
|
||||
}
|
||||
/*
|
||||
* TEXT
|
||||
*/
|
||||
| LTYPEB name ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode($1, Always, &$2, 0, &$5);
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LTYPEB name ',' con ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode($1, Always, &$2, 0, &$7);
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST;
|
||||
lastpc.From3.Offset = int64($4)
|
||||
}
|
||||
}
|
||||
/*
|
||||
* GLOBL
|
||||
*/
|
||||
| LGLOBL name ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym)
|
||||
outcode($1, Always, &$2, 0, &$4)
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LGLOBL name ',' con ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym)
|
||||
outcode($1, Always, &$2, 0, &$6)
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = int64($4)
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* DATA
|
||||
*/
|
||||
| LTYPEC name '/' con ',' ximm
|
||||
{
|
||||
outcode($1, Always, &$2, 0, &$6)
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = int64($4)
|
||||
}
|
||||
}
|
||||
/*
|
||||
* CASE
|
||||
*/
|
||||
| LTYPED cond reg comma
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &nullgen);
|
||||
}
|
||||
/*
|
||||
* word
|
||||
*/
|
||||
| LTYPEH comma ximm
|
||||
{
|
||||
outcode($1, Always, &nullgen, 0, &$3);
|
||||
}
|
||||
/*
|
||||
* floating-point coprocessor
|
||||
*/
|
||||
| LTYPEI cond freg ',' freg
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &$5);
|
||||
}
|
||||
| LTYPEK cond frcon ',' freg
|
||||
{
|
||||
outcode($1, $2, &$3, 0, &$5);
|
||||
}
|
||||
| LTYPEK cond frcon ',' LFREG ',' freg
|
||||
{
|
||||
outcode($1, $2, &$3, $5, &$7);
|
||||
}
|
||||
| LTYPEL cond freg ',' freg comma
|
||||
{
|
||||
outcode($1, $2, &$3, int32($5.Reg), &nullgen);
|
||||
}
|
||||
/*
|
||||
* MCR MRC
|
||||
*/
|
||||
| LTYPEJ cond con ',' expr ',' spreg ',' creg ',' creg oexpr
|
||||
{
|
||||
var g obj.Addr
|
||||
|
||||
g = nullgen;
|
||||
g.Type = obj.TYPE_CONST;
|
||||
g.Offset = int64(
|
||||
(0xe << 24) | /* opcode */
|
||||
($1 << 20) | /* MCR/MRC */
|
||||
(($2^C_SCOND_XOR) << 28) | /* scond */
|
||||
(($3 & 15) << 8) | /* coprocessor number */
|
||||
(($5 & 7) << 21) | /* coprocessor operation */
|
||||
(($7 & 15) << 12) | /* arm register */
|
||||
(($9 & 15) << 16) | /* Crn */
|
||||
(($11 & 15) << 0) | /* Crm */
|
||||
(($12 & 7) << 5) | /* coprocessor information */
|
||||
(1<<4)); /* must be set */
|
||||
outcode(AMRC, Always, &nullgen, 0, &g);
|
||||
}
|
||||
/*
|
||||
* MULL r1,r2,(hi,lo)
|
||||
*/
|
||||
| LTYPEM cond reg ',' reg ',' regreg
|
||||
{
|
||||
outcode($1, $2, &$3, int32($5.Reg), &$7);
|
||||
}
|
||||
/*
|
||||
* MULA r1,r2,r3,r4: (r1*r2+r3) & 0xffffffff . r4
|
||||
* MULAW{T,B} r1,r2,r3,r4
|
||||
*/
|
||||
| LTYPEN cond reg ',' reg ',' reg ',' spreg
|
||||
{
|
||||
$7.Type = obj.TYPE_REGREG2;
|
||||
$7.Offset = int64($9);
|
||||
outcode($1, $2, &$3, int32($5.Reg), &$7);
|
||||
}
|
||||
/*
|
||||
* PLD
|
||||
*/
|
||||
| LTYPEPLD oreg
|
||||
{
|
||||
outcode($1, Always, &$2, 0, &nullgen);
|
||||
}
|
||||
/*
|
||||
* PCDATA
|
||||
*/
|
||||
| LTYPEPC gen ',' gen
|
||||
{
|
||||
if $2.Type != obj.TYPE_CONST || $4.Type != obj.TYPE_CONST {
|
||||
yyerror("arguments to PCDATA must be integer constants")
|
||||
}
|
||||
outcode($1, Always, &$2, 0, &$4);
|
||||
}
|
||||
/*
|
||||
* FUNCDATA
|
||||
*/
|
||||
| LTYPEF gen ',' gen
|
||||
{
|
||||
if $2.Type != obj.TYPE_CONST {
|
||||
yyerror("index for FUNCDATA must be integer constant")
|
||||
}
|
||||
if $4.Type != obj.NAME_EXTERN && $4.Type != obj.NAME_STATIC && $4.Type != obj.TYPE_MEM {
|
||||
yyerror("value for FUNCDATA must be symbol reference")
|
||||
}
|
||||
outcode($1, Always, &$2, 0, &$4);
|
||||
}
|
||||
/*
|
||||
* END
|
||||
*/
|
||||
| LTYPEE comma
|
||||
{
|
||||
outcode($1, Always, &nullgen, 0, &nullgen);
|
||||
}
|
||||
|
||||
textsize:
|
||||
LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = int64($1)
|
||||
$$.Val = int32(obj.ArgsSizeUnknown)
|
||||
}
|
||||
| '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -int64($2)
|
||||
$$.Val = int32(obj.ArgsSizeUnknown)
|
||||
}
|
||||
| LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = int64($1)
|
||||
$$.Val = int32($3);
|
||||
}
|
||||
| '-' LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -int64($2)
|
||||
$$.Val = int32($4);
|
||||
}
|
||||
|
||||
cond:
|
||||
{
|
||||
$$ = Always;
|
||||
}
|
||||
| cond LCOND
|
||||
{
|
||||
$$ = ($1 & ^ C_SCOND) | $2;
|
||||
}
|
||||
| cond LS
|
||||
{
|
||||
$$ = $1 | $2;
|
||||
}
|
||||
|
||||
comma:
|
||||
| ',' comma
|
||||
|
||||
rel:
|
||||
con '(' LPC ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = int64($1) + int64(asm.PC);
|
||||
}
|
||||
| LNAME offset
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
$$ = nullgen;
|
||||
if asm.Pass == 2 && $1.Type != LLAB {
|
||||
yyerror("undefined label: %s", $1.Labelname)
|
||||
}
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = $1.Value + int64($2);
|
||||
}
|
||||
|
||||
ximm: '$' con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_CONST;
|
||||
$$.Offset = int64($2);
|
||||
}
|
||||
| '$' oreg
|
||||
{
|
||||
$$ = $2;
|
||||
$$.Type = obj.TYPE_ADDR;
|
||||
}
|
||||
| '$' LSCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SCONST;
|
||||
$$.Val = $2
|
||||
}
|
||||
| fcon
|
||||
|
||||
fcon:
|
||||
'$' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = $2;
|
||||
}
|
||||
| '$' '-' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = -$3;
|
||||
}
|
||||
|
||||
reglist:
|
||||
spreg
|
||||
{
|
||||
$$ = 1 << uint($1&15);
|
||||
}
|
||||
| spreg '-' spreg
|
||||
{
|
||||
$$=0;
|
||||
for i:=$1; i<=$3; i++ {
|
||||
$$ |= 1<<uint(i&15)
|
||||
}
|
||||
for i:=$3; i<=$1; i++ {
|
||||
$$ |= 1<<uint(i&15)
|
||||
}
|
||||
}
|
||||
| spreg comma reglist
|
||||
{
|
||||
$$ = (1<<uint($1&15)) | $3;
|
||||
}
|
||||
|
||||
gen:
|
||||
reg
|
||||
| ximm
|
||||
| shift
|
||||
| shift '(' spreg ')'
|
||||
{
|
||||
$$ = $1;
|
||||
$$.Reg = int16($3);
|
||||
}
|
||||
| LPSR
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LFCR
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Offset = int64($1);
|
||||
}
|
||||
| oreg
|
||||
| freg
|
||||
|
||||
nireg:
|
||||
ireg
|
||||
| name
|
||||
{
|
||||
$$ = $1;
|
||||
if($1.Name != obj.NAME_EXTERN && $1.Name != obj.NAME_STATIC) {
|
||||
}
|
||||
}
|
||||
|
||||
ireg:
|
||||
'(' spreg ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Reg = int16($2);
|
||||
$$.Offset = 0;
|
||||
}
|
||||
|
||||
ioreg:
|
||||
ireg
|
||||
| con '(' sreg ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Reg = int16($3);
|
||||
$$.Offset = int64($1);
|
||||
}
|
||||
|
||||
oreg:
|
||||
name
|
||||
| name '(' sreg ')'
|
||||
{
|
||||
$$ = $1;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Reg = int16($3);
|
||||
}
|
||||
| ioreg
|
||||
|
||||
imsr:
|
||||
reg
|
||||
| imm
|
||||
| shift
|
||||
|
||||
imm: '$' con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_CONST;
|
||||
$$.Offset = int64($2);
|
||||
}
|
||||
|
||||
reg:
|
||||
spreg
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG;
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
|
||||
regreg:
|
||||
'(' spreg ',' spreg ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REGREG;
|
||||
$$.Reg = int16($2);
|
||||
$$.Offset = int64($4);
|
||||
}
|
||||
|
||||
shift:
|
||||
spreg '<' '<' rcon
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SHIFT;
|
||||
$$.Offset = int64($1&15) | int64($4) | (0 << 5);
|
||||
}
|
||||
| spreg '>' '>' rcon
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SHIFT;
|
||||
$$.Offset = int64($1&15) | int64($4) | (1 << 5);
|
||||
}
|
||||
| spreg '-' '>' rcon
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SHIFT;
|
||||
$$.Offset = int64($1&15) | int64($4) | (2 << 5);
|
||||
}
|
||||
| spreg LAT '>' rcon
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SHIFT;
|
||||
$$.Offset = int64($1&15) | int64($4) | (3 << 5);
|
||||
}
|
||||
|
||||
rcon:
|
||||
spreg
|
||||
{
|
||||
if $$ < REG_R0 || $$ > REG_R15 {
|
||||
print("register value out of range\n")
|
||||
}
|
||||
$$ = (($1&15) << 8) | (1 << 4);
|
||||
}
|
||||
| con
|
||||
{
|
||||
if $$ < 0 || $$ >= 32 {
|
||||
print("shift value out of range\n")
|
||||
}
|
||||
$$ = ($1&31) << 7;
|
||||
}
|
||||
|
||||
sreg:
|
||||
LREG
|
||||
| LPC
|
||||
{
|
||||
$$ = REGPC;
|
||||
}
|
||||
| LR '(' expr ')'
|
||||
{
|
||||
if $3 < 0 || $3 >= NREG {
|
||||
print("register value out of range\n")
|
||||
}
|
||||
$$ = REG_R0 + $3;
|
||||
}
|
||||
|
||||
spreg:
|
||||
sreg
|
||||
| LSP
|
||||
{
|
||||
$$ = REGSP;
|
||||
}
|
||||
|
||||
creg:
|
||||
LCREG
|
||||
| LC '(' expr ')'
|
||||
{
|
||||
if $3 < 0 || $3 >= NREG {
|
||||
print("register value out of range\n")
|
||||
}
|
||||
$$ = $3; // TODO(rsc): REG_C0+$3
|
||||
}
|
||||
|
||||
frcon:
|
||||
freg
|
||||
| fcon
|
||||
|
||||
freg:
|
||||
LFREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG;
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LF '(' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG;
|
||||
$$.Reg = int16(REG_F0 + $3);
|
||||
}
|
||||
|
||||
name:
|
||||
con '(' pointer ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Name = int8($3);
|
||||
$$.Sym = nil;
|
||||
$$.Offset = int64($1);
|
||||
}
|
||||
| LNAME offset '(' pointer ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Name = int8($4);
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 0);
|
||||
$$.Offset = int64($2);
|
||||
}
|
||||
| LNAME '<' '>' offset '(' LSB ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM;
|
||||
$$.Name = obj.NAME_STATIC;
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 1);
|
||||
$$.Offset = int64($4);
|
||||
}
|
||||
|
||||
offset:
|
||||
{
|
||||
$$ = 0;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
|
||||
pointer:
|
||||
LSB
|
||||
| LSP
|
||||
| LFP
|
||||
|
||||
con:
|
||||
LCONST
|
||||
| LVAR
|
||||
{
|
||||
$$ = int32($1.Value);
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '~' con
|
||||
{
|
||||
$$ = ^$2;
|
||||
}
|
||||
| '(' expr ')'
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
|
||||
oexpr:
|
||||
{
|
||||
$$ = 0;
|
||||
}
|
||||
| ',' expr
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
|
||||
expr:
|
||||
con
|
||||
| expr '+' expr
|
||||
{
|
||||
$$ = $1 + $3;
|
||||
}
|
||||
| expr '-' expr
|
||||
{
|
||||
$$ = $1 - $3;
|
||||
}
|
||||
| expr '*' expr
|
||||
{
|
||||
$$ = $1 * $3;
|
||||
}
|
||||
| expr '/' expr
|
||||
{
|
||||
$$ = $1 / $3;
|
||||
}
|
||||
| expr '%' expr
|
||||
{
|
||||
$$ = $1 % $3;
|
||||
}
|
||||
| expr '<' '<' expr
|
||||
{
|
||||
$$ = $1 << uint($4);
|
||||
}
|
||||
| expr '>' '>' expr
|
||||
{
|
||||
$$ = $1 >> uint($4);
|
||||
}
|
||||
| expr '&' expr
|
||||
{
|
||||
$$ = $1 & $3;
|
||||
}
|
||||
| expr '^' expr
|
||||
{
|
||||
$$ = $1 ^ $3;
|
||||
}
|
||||
| expr '|' expr
|
||||
{
|
||||
$$ = $1 | $3;
|
||||
}
|
||||
|
|
@ -1,373 +0,0 @@
|
|||
// Inferno utils/5a/lex.c
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/5a/lex.c
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
//go:generate go tool yacc a.y
|
||||
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/obj/arm"
|
||||
)
|
||||
|
||||
var (
|
||||
yyerror = asm.Yyerror
|
||||
nullgen obj.Addr
|
||||
stmtline int32
|
||||
)
|
||||
|
||||
const Always = arm.C_SCOND_NONE
|
||||
|
||||
func main() {
|
||||
cinit()
|
||||
|
||||
asm.LSCONST = LSCONST
|
||||
asm.LCONST = LCONST
|
||||
asm.LFCONST = LFCONST
|
||||
asm.LNAME = LNAME
|
||||
asm.LVAR = LVAR
|
||||
asm.LLAB = LLAB
|
||||
|
||||
asm.Lexinit = lexinit
|
||||
asm.Cclean = cclean
|
||||
asm.Yyparse = yyparse
|
||||
|
||||
asm.Thechar = '5'
|
||||
asm.Thestring = "arm"
|
||||
asm.Thelinkarch = &arm.Linkarm
|
||||
|
||||
asm.Main()
|
||||
}
|
||||
|
||||
type yy struct{}
|
||||
|
||||
func (yy) Lex(v *yySymType) int {
|
||||
var av asm.Yylval
|
||||
tok := asm.Yylex(&av)
|
||||
v.sym = av.Sym
|
||||
v.lval = int32(av.Lval)
|
||||
v.sval = av.Sval
|
||||
v.dval = av.Dval
|
||||
return tok
|
||||
}
|
||||
|
||||
func (yy) Error(msg string) {
|
||||
asm.Yyerror("%s", msg)
|
||||
}
|
||||
|
||||
func yyparse() {
|
||||
yyParse(yy{})
|
||||
}
|
||||
|
||||
var lexinit = []asm.Lextab{
|
||||
{"SP", LSP, obj.NAME_AUTO},
|
||||
{"SB", LSB, obj.NAME_EXTERN},
|
||||
{"FP", LFP, obj.NAME_PARAM},
|
||||
{"PC", LPC, obj.TYPE_BRANCH},
|
||||
|
||||
{"R", LR, 0},
|
||||
|
||||
{"R0", LREG, arm.REG_R0},
|
||||
{"R1", LREG, arm.REG_R1},
|
||||
{"R2", LREG, arm.REG_R2},
|
||||
{"R3", LREG, arm.REG_R3},
|
||||
{"R4", LREG, arm.REG_R4},
|
||||
{"R5", LREG, arm.REG_R5},
|
||||
{"R6", LREG, arm.REG_R6},
|
||||
{"R7", LREG, arm.REG_R7},
|
||||
{"R8", LREG, arm.REG_R8},
|
||||
{"R9", LREG, arm.REG_R9},
|
||||
{"g", LREG, arm.REG_R10}, // avoid unintentionally clobber g using R10
|
||||
{"R11", LREG, arm.REG_R11},
|
||||
{"R12", LREG, arm.REG_R12},
|
||||
{"R13", LREG, arm.REG_R13},
|
||||
{"R14", LREG, arm.REG_R14},
|
||||
{"R15", LREG, arm.REG_R15},
|
||||
{"F", LF, 0},
|
||||
{"F0", LFREG, arm.REG_F0},
|
||||
{"F1", LFREG, arm.REG_F1},
|
||||
{"F2", LFREG, arm.REG_F2},
|
||||
{"F3", LFREG, arm.REG_F3},
|
||||
{"F4", LFREG, arm.REG_F4},
|
||||
{"F5", LFREG, arm.REG_F5},
|
||||
{"F6", LFREG, arm.REG_F6},
|
||||
{"F7", LFREG, arm.REG_F7},
|
||||
{"F8", LFREG, arm.REG_F8},
|
||||
{"F9", LFREG, arm.REG_F9},
|
||||
{"F10", LFREG, arm.REG_F10},
|
||||
{"F11", LFREG, arm.REG_F11},
|
||||
{"F12", LFREG, arm.REG_F12},
|
||||
{"F13", LFREG, arm.REG_F13},
|
||||
{"F14", LFREG, arm.REG_F14},
|
||||
{"F15", LFREG, arm.REG_F15},
|
||||
{"C", LC, 0},
|
||||
{"C0", LCREG, 0},
|
||||
{"C1", LCREG, 1},
|
||||
{"C2", LCREG, 2},
|
||||
{"C3", LCREG, 3},
|
||||
{"C4", LCREG, 4},
|
||||
{"C5", LCREG, 5},
|
||||
{"C6", LCREG, 6},
|
||||
{"C7", LCREG, 7},
|
||||
{"C8", LCREG, 8},
|
||||
{"C9", LCREG, 9},
|
||||
{"C10", LCREG, 10},
|
||||
{"C11", LCREG, 11},
|
||||
{"C12", LCREG, 12},
|
||||
{"C13", LCREG, 13},
|
||||
{"C14", LCREG, 14},
|
||||
{"C15", LCREG, 15},
|
||||
{"CPSR", LPSR, arm.REG_CPSR},
|
||||
{"SPSR", LPSR, arm.REG_SPSR},
|
||||
{"FPSR", LFCR, arm.REG_FPSR},
|
||||
{"FPCR", LFCR, arm.REG_FPCR},
|
||||
{".EQ", LCOND, arm.C_SCOND_EQ},
|
||||
{".NE", LCOND, arm.C_SCOND_NE},
|
||||
{".CS", LCOND, arm.C_SCOND_HS},
|
||||
{".HS", LCOND, arm.C_SCOND_HS},
|
||||
{".CC", LCOND, arm.C_SCOND_LO},
|
||||
{".LO", LCOND, arm.C_SCOND_LO},
|
||||
{".MI", LCOND, arm.C_SCOND_MI},
|
||||
{".PL", LCOND, arm.C_SCOND_PL},
|
||||
{".VS", LCOND, arm.C_SCOND_VS},
|
||||
{".VC", LCOND, arm.C_SCOND_VC},
|
||||
{".HI", LCOND, arm.C_SCOND_HI},
|
||||
{".LS", LCOND, arm.C_SCOND_LS},
|
||||
{".GE", LCOND, arm.C_SCOND_GE},
|
||||
{".LT", LCOND, arm.C_SCOND_LT},
|
||||
{".GT", LCOND, arm.C_SCOND_GT},
|
||||
{".LE", LCOND, arm.C_SCOND_LE},
|
||||
{".AL", LCOND, arm.C_SCOND_NONE},
|
||||
{".U", LS, arm.C_UBIT},
|
||||
{".S", LS, arm.C_SBIT},
|
||||
{".W", LS, arm.C_WBIT},
|
||||
{".P", LS, arm.C_PBIT},
|
||||
{".PW", LS, arm.C_WBIT | arm.C_PBIT},
|
||||
{".WP", LS, arm.C_WBIT | arm.C_PBIT},
|
||||
{".F", LS, arm.C_FBIT},
|
||||
{".IBW", LS, arm.C_WBIT | arm.C_PBIT | arm.C_UBIT},
|
||||
{".IAW", LS, arm.C_WBIT | arm.C_UBIT},
|
||||
{".DBW", LS, arm.C_WBIT | arm.C_PBIT},
|
||||
{".DAW", LS, arm.C_WBIT},
|
||||
{".IB", LS, arm.C_PBIT | arm.C_UBIT},
|
||||
{".IA", LS, arm.C_UBIT},
|
||||
{".DB", LS, arm.C_PBIT},
|
||||
{".DA", LS, 0},
|
||||
{"@", LAT, 0},
|
||||
{"AND", LTYPE1, arm.AAND},
|
||||
{"EOR", LTYPE1, arm.AEOR},
|
||||
{"SUB", LTYPE1, arm.ASUB},
|
||||
{"RSB", LTYPE1, arm.ARSB},
|
||||
{"ADD", LTYPE1, arm.AADD},
|
||||
{"ADC", LTYPE1, arm.AADC},
|
||||
{"SBC", LTYPE1, arm.ASBC},
|
||||
{"RSC", LTYPE1, arm.ARSC},
|
||||
{"ORR", LTYPE1, arm.AORR},
|
||||
{"BIC", LTYPE1, arm.ABIC},
|
||||
{"SLL", LTYPE1, arm.ASLL},
|
||||
{"SRL", LTYPE1, arm.ASRL},
|
||||
{"SRA", LTYPE1, arm.ASRA},
|
||||
{"MUL", LTYPE1, arm.AMUL},
|
||||
{"MULA", LTYPEN, arm.AMULA},
|
||||
{"DIV", LTYPE1, arm.ADIV},
|
||||
{"MOD", LTYPE1, arm.AMOD},
|
||||
{"MULL", LTYPEM, arm.AMULL},
|
||||
{"MULAL", LTYPEM, arm.AMULAL},
|
||||
{"MULLU", LTYPEM, arm.AMULLU},
|
||||
{"MULALU", LTYPEM, arm.AMULALU},
|
||||
{"MVN", LTYPE2, arm.AMVN}, /* op2 ignored */
|
||||
{"MOVB", LTYPE3, arm.AMOVB},
|
||||
{"MOVBU", LTYPE3, arm.AMOVBU},
|
||||
{"MOVH", LTYPE3, arm.AMOVH},
|
||||
{"MOVHU", LTYPE3, arm.AMOVHU},
|
||||
{"MOVW", LTYPE3, arm.AMOVW},
|
||||
{"MOVD", LTYPE3, arm.AMOVD},
|
||||
{"MOVDF", LTYPE3, arm.AMOVDF},
|
||||
{"MOVDW", LTYPE3, arm.AMOVDW},
|
||||
{"MOVF", LTYPE3, arm.AMOVF},
|
||||
{"MOVFD", LTYPE3, arm.AMOVFD},
|
||||
{"MOVFW", LTYPE3, arm.AMOVFW},
|
||||
{"MOVWD", LTYPE3, arm.AMOVWD},
|
||||
{"MOVWF", LTYPE3, arm.AMOVWF},
|
||||
{"LDREX", LTYPE3, arm.ALDREX},
|
||||
{"LDREXD", LTYPE3, arm.ALDREXD},
|
||||
{"STREX", LTYPE9, arm.ASTREX},
|
||||
{"STREXD", LTYPE9, arm.ASTREXD},
|
||||
|
||||
/*
|
||||
{"NEGF", LTYPEI, ANEGF},
|
||||
{"NEGD", LTYPEI, ANEGD},
|
||||
{"SQTF", LTYPEI, ASQTF},
|
||||
{"SQTD", LTYPEI, ASQTD},
|
||||
{"RNDF", LTYPEI, ARNDF},
|
||||
{"RNDD", LTYPEI, ARNDD},
|
||||
{"URDF", LTYPEI, AURDF},
|
||||
{"URDD", LTYPEI, AURDD},
|
||||
{"NRMF", LTYPEI, ANRMF},
|
||||
{"NRMD", LTYPEI, ANRMD},
|
||||
*/
|
||||
{"ABSF", LTYPEI, arm.AABSF},
|
||||
{"ABSD", LTYPEI, arm.AABSD},
|
||||
{"SQRTF", LTYPEI, arm.ASQRTF},
|
||||
{"SQRTD", LTYPEI, arm.ASQRTD},
|
||||
{"CMPF", LTYPEL, arm.ACMPF},
|
||||
{"CMPD", LTYPEL, arm.ACMPD},
|
||||
{"ADDF", LTYPEK, arm.AADDF},
|
||||
{"ADDD", LTYPEK, arm.AADDD},
|
||||
{"SUBF", LTYPEK, arm.ASUBF},
|
||||
{"SUBD", LTYPEK, arm.ASUBD},
|
||||
{"MULF", LTYPEK, arm.AMULF},
|
||||
{"MULD", LTYPEK, arm.AMULD},
|
||||
{"DIVF", LTYPEK, arm.ADIVF},
|
||||
{"DIVD", LTYPEK, arm.ADIVD},
|
||||
{"B", LTYPE4, arm.AB},
|
||||
{"JMP", LTYPE4, arm.AB},
|
||||
{"BL", LTYPE4, arm.ABL},
|
||||
{"CALL", LTYPE4, arm.ABL},
|
||||
{"BX", LTYPEBX, arm.ABX},
|
||||
{"BEQ", LTYPE5, arm.ABEQ},
|
||||
{"BNE", LTYPE5, arm.ABNE},
|
||||
{"BCS", LTYPE5, arm.ABCS},
|
||||
{"BHS", LTYPE5, arm.ABHS},
|
||||
{"BCC", LTYPE5, arm.ABCC},
|
||||
{"BLO", LTYPE5, arm.ABLO},
|
||||
{"BMI", LTYPE5, arm.ABMI},
|
||||
{"BPL", LTYPE5, arm.ABPL},
|
||||
{"BVS", LTYPE5, arm.ABVS},
|
||||
{"BVC", LTYPE5, arm.ABVC},
|
||||
{"BHI", LTYPE5, arm.ABHI},
|
||||
{"BLS", LTYPE5, arm.ABLS},
|
||||
{"BGE", LTYPE5, arm.ABGE},
|
||||
{"BLT", LTYPE5, arm.ABLT},
|
||||
{"BGT", LTYPE5, arm.ABGT},
|
||||
{"BLE", LTYPE5, arm.ABLE},
|
||||
{"BCASE", LTYPE5, arm.ABCASE},
|
||||
{"SWI", LTYPE6, arm.ASWI},
|
||||
{"CMP", LTYPE7, arm.ACMP},
|
||||
{"TST", LTYPE7, arm.ATST},
|
||||
{"TEQ", LTYPE7, arm.ATEQ},
|
||||
{"CMN", LTYPE7, arm.ACMN},
|
||||
{"MOVM", LTYPE8, arm.AMOVM},
|
||||
{"SWPBU", LTYPE9, arm.ASWPBU},
|
||||
{"SWPW", LTYPE9, arm.ASWPW},
|
||||
{"RET", LTYPEA, obj.ARET},
|
||||
{"RFE", LTYPEA, arm.ARFE},
|
||||
{"TEXT", LTYPEB, obj.ATEXT},
|
||||
{"GLOBL", LGLOBL, obj.AGLOBL},
|
||||
{"DATA", LTYPEC, obj.ADATA},
|
||||
{"CASE", LTYPED, arm.ACASE},
|
||||
{"END", LTYPEE, obj.AEND},
|
||||
{"WORD", LTYPEH, arm.AWORD},
|
||||
{"NOP", LTYPEI, obj.ANOP},
|
||||
{"MCR", LTYPEJ, 0},
|
||||
{"MRC", LTYPEJ, 1},
|
||||
{"PLD", LTYPEPLD, arm.APLD},
|
||||
{"UNDEF", LTYPEE, obj.AUNDEF},
|
||||
{"CLZ", LTYPE2, arm.ACLZ},
|
||||
{"MULWT", LTYPE1, arm.AMULWT},
|
||||
{"MULWB", LTYPE1, arm.AMULWB},
|
||||
{"MULAWT", LTYPEN, arm.AMULAWT},
|
||||
{"MULAWB", LTYPEN, arm.AMULAWB},
|
||||
{"USEFIELD", LTYPEN, obj.AUSEFIELD},
|
||||
{"PCDATA", LTYPEPC, obj.APCDATA},
|
||||
{"FUNCDATA", LTYPEF, obj.AFUNCDATA},
|
||||
}
|
||||
|
||||
func cinit() {
|
||||
}
|
||||
|
||||
func isreg(g *obj.Addr) bool {
|
||||
return true
|
||||
}
|
||||
|
||||
func cclean() {
|
||||
outcode(obj.AEND, Always, &nullgen, 0, &nullgen)
|
||||
}
|
||||
|
||||
var bcode = []int{
|
||||
arm.ABEQ,
|
||||
arm.ABNE,
|
||||
arm.ABCS,
|
||||
arm.ABCC,
|
||||
arm.ABMI,
|
||||
arm.ABPL,
|
||||
arm.ABVS,
|
||||
arm.ABVC,
|
||||
arm.ABHI,
|
||||
arm.ABLS,
|
||||
arm.ABGE,
|
||||
arm.ABLT,
|
||||
arm.ABGT,
|
||||
arm.ABLE,
|
||||
arm.AB,
|
||||
obj.ANOP,
|
||||
}
|
||||
|
||||
var lastpc *obj.Prog
|
||||
|
||||
func outcode(a, scond int32, g1 *obj.Addr, reg int32, g2 *obj.Addr) {
|
||||
var p *obj.Prog
|
||||
var pl *obj.Plist
|
||||
|
||||
/* hack to make B.NE etc. work: turn it into the corresponding conditional */
|
||||
if a == arm.AB {
|
||||
a = int32(bcode[(scond^arm.C_SCOND_XOR)&0xf])
|
||||
scond = (scond &^ 0xf) | Always
|
||||
}
|
||||
|
||||
if asm.Pass == 1 {
|
||||
goto out
|
||||
}
|
||||
|
||||
p = new(obj.Prog)
|
||||
*p = obj.Prog{}
|
||||
p.Ctxt = asm.Ctxt
|
||||
p.As = int16(a)
|
||||
p.Lineno = stmtline
|
||||
p.Scond = uint8(scond)
|
||||
p.From = *g1
|
||||
p.Reg = int16(reg)
|
||||
p.To = *g2
|
||||
p.Pc = int64(asm.PC)
|
||||
|
||||
if lastpc == nil {
|
||||
pl = obj.Linknewplist(asm.Ctxt)
|
||||
pl.Firstpc = p
|
||||
} else {
|
||||
lastpc.Link = p
|
||||
}
|
||||
lastpc = p
|
||||
|
||||
out:
|
||||
if a != obj.AGLOBL && a != obj.ADATA {
|
||||
asm.PC++
|
||||
}
|
||||
}
|
||||
1547
src/cmd/old5a/y.go
1547
src/cmd/old5a/y.go
File diff suppressed because it is too large
Load Diff
|
|
@ -1,730 +0,0 @@
|
|||
// Inferno utils/6a/a.y
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/6a/a.y
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
%{
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/obj/x86"
|
||||
)
|
||||
%}
|
||||
|
||||
%union {
|
||||
sym *asm.Sym
|
||||
lval int64
|
||||
dval float64
|
||||
sval string
|
||||
addr obj.Addr
|
||||
addr2 Addr2
|
||||
}
|
||||
|
||||
%left '|'
|
||||
%left '^'
|
||||
%left '&'
|
||||
%left '<' '>'
|
||||
%left '+' '-'
|
||||
%left '*' '/' '%'
|
||||
%token <lval> LTYPE0 LTYPE1 LTYPE2 LTYPE3 LTYPE4
|
||||
%token <lval> LTYPEC LTYPED LTYPEN LTYPER LTYPET LTYPEG LTYPEPC
|
||||
%token <lval> LTYPES LTYPEM LTYPEI LTYPEXC LTYPEX LTYPERT LTYPEF
|
||||
%token <lval> LCONST LFP LPC LSB
|
||||
%token <lval> LBREG LLREG LSREG LFREG LMREG LXREG
|
||||
%token <dval> LFCONST
|
||||
%token <sval> LSCONST LSP
|
||||
%token <sym> LNAME LLAB LVAR
|
||||
%type <lval> con expr pointer offset
|
||||
%type <addr> mem imm textsize reg nam rel rem rim rom omem nmem
|
||||
%type <addr2> nonnon nonrel nonrem rimnon rimrem remrim
|
||||
%type <addr2> spec3 spec4 spec5 spec6 spec7 spec8 spec9
|
||||
%type <addr2> spec10 spec12 spec13
|
||||
%%
|
||||
prog:
|
||||
| prog
|
||||
{
|
||||
stmtline = asm.Lineno;
|
||||
}
|
||||
line
|
||||
|
||||
line:
|
||||
LNAME ':'
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
if $1.Type == LLAB && $1.Value != int64(asm.PC) {
|
||||
yyerror("redeclaration of %s (%s)", $1.Labelname, $1.Name);
|
||||
}
|
||||
$1.Type = LLAB;
|
||||
$1.Value = int64(asm.PC)
|
||||
}
|
||||
line
|
||||
| ';'
|
||||
| inst ';'
|
||||
| error ';'
|
||||
|
||||
inst:
|
||||
LNAME '=' expr
|
||||
{
|
||||
$1.Type = LVAR;
|
||||
$1.Value = $3;
|
||||
}
|
||||
| LVAR '=' expr
|
||||
{
|
||||
if $1.Value != $3 {
|
||||
yyerror("redeclaration of %s", $1.Name);
|
||||
}
|
||||
$1.Value = $3;
|
||||
}
|
||||
| LTYPE0 nonnon { outcode(int($1), &$2); }
|
||||
| LTYPE1 nonrem { outcode(int($1), &$2); }
|
||||
| LTYPE2 rimnon { outcode(int($1), &$2); }
|
||||
| LTYPE3 rimrem { outcode(int($1), &$2); }
|
||||
| LTYPE4 remrim { outcode(int($1), &$2); }
|
||||
| LTYPER nonrel { outcode(int($1), &$2); }
|
||||
| spec1
|
||||
| spec2
|
||||
| LTYPEC spec3 { outcode(int($1), &$2); }
|
||||
| LTYPEN spec4 { outcode(int($1), &$2); }
|
||||
| LTYPES spec5 { outcode(int($1), &$2); }
|
||||
| LTYPEM spec6 { outcode(int($1), &$2); }
|
||||
| LTYPEI spec7 { outcode(int($1), &$2); }
|
||||
| LTYPEXC spec8 { outcode(int($1), &$2); }
|
||||
| LTYPEX spec9 { outcode(int($1), &$2); }
|
||||
| LTYPERT spec10 { outcode(int($1), &$2); }
|
||||
| spec11
|
||||
| LTYPEPC spec12 { outcode(int($1), &$2); }
|
||||
| LTYPEF spec13 { outcode(int($1), &$2); }
|
||||
|
||||
nonnon:
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| ','
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
|
||||
rimrem:
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
remrim:
|
||||
rem ',' rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
rimnon:
|
||||
rim ','
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
|
||||
nonrem:
|
||||
',' rem
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rem
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
|
||||
nonrel:
|
||||
',' rel
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rel
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
| imm ',' rel
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec1: /* DATA */
|
||||
LTYPED nam '/' con ',' imm
|
||||
{
|
||||
var a Addr2
|
||||
a.from = $2
|
||||
a.to = $6
|
||||
outcode(obj.ADATA, &a)
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
spec2: /* TEXT */
|
||||
LTYPET mem ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.ATEXT, &Addr2{from: $2, to: $5})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LTYPET mem ',' con ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.ATEXT, &Addr2{from: $2, to: $7})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
spec11: /* GLOBL */
|
||||
LTYPEG mem ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym)
|
||||
outcode(obj.AGLOBL, &Addr2{from: $2, to: $4})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LTYPEG mem ',' con ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym)
|
||||
outcode(obj.AGLOBL, &Addr2{from: $2, to: $6})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
spec3: /* JMP/CALL */
|
||||
',' rom
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rom
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
|
||||
spec4: /* NOP */
|
||||
nonnon
|
||||
| nonrem
|
||||
|
||||
spec5: /* SHL/SHR */
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
| rim ',' rem ':' LLREG
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
if $$.from.Index != obj.TYPE_NONE {
|
||||
yyerror("dp shift with lhs index");
|
||||
}
|
||||
$$.from.Index = int16($5);
|
||||
}
|
||||
|
||||
spec6: /* MOVW/MOVL */
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
| rim ',' rem ':' LSREG
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
if $$.to.Index != obj.TYPE_NONE {
|
||||
yyerror("dp move with lhs index");
|
||||
}
|
||||
$$.to.Index = int16($5);
|
||||
}
|
||||
|
||||
spec7:
|
||||
rim ','
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec8: /* CMPPS/CMPPD */
|
||||
rem ',' reg ',' con
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.from3 = $3;
|
||||
$$.to.Type = obj.TYPE_MEM; // to give library something to do
|
||||
$$.to.Offset = $5;
|
||||
}
|
||||
|
||||
spec9: /* shufl */
|
||||
imm ',' rem ',' reg
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.from3 = $3;
|
||||
$$.to = $5;
|
||||
}
|
||||
|
||||
spec10: /* RET/RETF */
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| imm
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
|
||||
spec12: /* asm.PCDATA */
|
||||
rim ',' rim
|
||||
{
|
||||
if $1.Type != obj.TYPE_CONST || $3.Type != obj.TYPE_CONST {
|
||||
yyerror("arguments to asm.PCDATA must be integer constants");
|
||||
}
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec13: /* FUNCDATA */
|
||||
rim ',' rim
|
||||
{
|
||||
if $1.Type != obj.TYPE_CONST {
|
||||
yyerror("index for FUNCDATA must be integer constant");
|
||||
}
|
||||
if $3.Type != obj.TYPE_MEM || ($3.Name != obj.NAME_EXTERN && $3.Name != obj.NAME_STATIC) {
|
||||
yyerror("value for FUNCDATA must be symbol reference");
|
||||
}
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
rem:
|
||||
reg
|
||||
| mem
|
||||
|
||||
rom:
|
||||
rel
|
||||
| nmem
|
||||
| '*' reg
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '*' omem
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| reg
|
||||
| omem
|
||||
|
||||
rim:
|
||||
rem
|
||||
| imm
|
||||
|
||||
rel:
|
||||
con '(' LPC ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = $1 + int64(asm.PC);
|
||||
}
|
||||
| LNAME offset
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
$$ = nullgen;
|
||||
if asm.Pass == 2 && $1.Type != LLAB {
|
||||
yyerror("undefined label: %s", $1.Labelname);
|
||||
}
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = $1.Value + $2;
|
||||
}
|
||||
|
||||
reg:
|
||||
LBREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LFREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LLREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LMREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LSP
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = x86.REG_SP;
|
||||
}
|
||||
| LSREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LXREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
|
||||
imm:
|
||||
'$' con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_CONST;
|
||||
$$.Offset = $2;
|
||||
}
|
||||
| '$' nam
|
||||
{
|
||||
$$ = $2;
|
||||
$$.Type = obj.TYPE_ADDR;
|
||||
/*
|
||||
if($2.Type == x86.D_AUTO || $2.Type == x86.D_PARAM)
|
||||
yyerror("constant cannot be automatic: %s",
|
||||
$2.sym.Name);
|
||||
*/
|
||||
}
|
||||
| '$' LSCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SCONST;
|
||||
$$.Val = ($2+"\x00\x00\x00\x00\x00\x00\x00\x00")[:8]
|
||||
}
|
||||
| '$' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = $2;
|
||||
}
|
||||
| '$' '(' LFCONST ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = $3;
|
||||
}
|
||||
| '$' '(' '-' LFCONST ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = -$4;
|
||||
}
|
||||
| '$' '-' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = -$3;
|
||||
}
|
||||
|
||||
mem:
|
||||
omem
|
||||
| nmem
|
||||
|
||||
omem:
|
||||
con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LLREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LSP ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = x86.REG_SP
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LSREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($3);
|
||||
$$.Scale = int16($5);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| con '(' LLREG ')' '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($6);
|
||||
$$.Scale = int16($8);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| con '(' LLREG ')' '(' LSREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($6);
|
||||
$$.Scale = int16($8);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| '(' LLREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($2)
|
||||
}
|
||||
| '(' LSP ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = x86.REG_SP
|
||||
}
|
||||
| '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Index = int16($2);
|
||||
$$.Scale = int16($4);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| '(' LLREG ')' '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($2)
|
||||
$$.Index = int16($5);
|
||||
$$.Scale = int16($7);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
|
||||
nmem:
|
||||
nam
|
||||
{
|
||||
$$ = $1;
|
||||
}
|
||||
| nam '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = $1;
|
||||
$$.Index = int16($3);
|
||||
$$.Scale = int16($5);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
|
||||
nam:
|
||||
LNAME offset '(' pointer ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Name = int8($4)
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 0);
|
||||
$$.Offset = $2;
|
||||
}
|
||||
| LNAME '<' '>' offset '(' LSB ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Name = obj.NAME_STATIC
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 1);
|
||||
$$.Offset = $4;
|
||||
}
|
||||
|
||||
offset:
|
||||
{
|
||||
$$ = 0;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
|
||||
pointer:
|
||||
LSB
|
||||
| LSP
|
||||
{
|
||||
$$ = obj.NAME_AUTO;
|
||||
}
|
||||
| LFP
|
||||
|
||||
con:
|
||||
LCONST
|
||||
| LVAR
|
||||
{
|
||||
$$ = $1.Value;
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '~' con
|
||||
{
|
||||
$$ = ^$2;
|
||||
}
|
||||
| '(' expr ')'
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
|
||||
textsize:
|
||||
LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = $1;
|
||||
$$.Val = int32(obj.ArgsSizeUnknown);
|
||||
}
|
||||
| '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -$2;
|
||||
$$.Val = int32(obj.ArgsSizeUnknown);
|
||||
}
|
||||
| LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = $1;
|
||||
$$.Val = int32($3);
|
||||
}
|
||||
| '-' LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -$2;
|
||||
$$.Val = int32($4);
|
||||
}
|
||||
|
||||
expr:
|
||||
con
|
||||
| expr '+' expr
|
||||
{
|
||||
$$ = $1 + $3;
|
||||
}
|
||||
| expr '-' expr
|
||||
{
|
||||
$$ = $1 - $3;
|
||||
}
|
||||
| expr '*' expr
|
||||
{
|
||||
$$ = $1 * $3;
|
||||
}
|
||||
| expr '/' expr
|
||||
{
|
||||
$$ = $1 / $3;
|
||||
}
|
||||
| expr '%' expr
|
||||
{
|
||||
$$ = $1 % $3;
|
||||
}
|
||||
| expr '<' '<' expr
|
||||
{
|
||||
$$ = $1 << uint($4);
|
||||
}
|
||||
| expr '>' '>' expr
|
||||
{
|
||||
$$ = $1 >> uint($4);
|
||||
}
|
||||
| expr '&' expr
|
||||
{
|
||||
$$ = $1 & $3;
|
||||
}
|
||||
| expr '^' expr
|
||||
{
|
||||
$$ = $1 ^ $3;
|
||||
}
|
||||
| expr '|' expr
|
||||
{
|
||||
$$ = $1 | $3;
|
||||
}
|
||||
|
|
@ -1,983 +0,0 @@
|
|||
// Inferno utils/6a/lex.c
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/6a/lex.c
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
//go:generate go tool yacc a.y
|
||||
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/obj/x86"
|
||||
)
|
||||
|
||||
var (
|
||||
yyerror = asm.Yyerror
|
||||
nullgen obj.Addr
|
||||
stmtline int32
|
||||
)
|
||||
|
||||
func main() {
|
||||
cinit()
|
||||
|
||||
asm.LSCONST = LSCONST
|
||||
asm.LCONST = LCONST
|
||||
asm.LFCONST = LFCONST
|
||||
asm.LNAME = LNAME
|
||||
asm.LVAR = LVAR
|
||||
asm.LLAB = LLAB
|
||||
|
||||
asm.Thechar = '6'
|
||||
asm.Thestring = "amd64"
|
||||
asm.Thelinkarch = &x86.Linkamd64
|
||||
asm.Arches = map[string]*obj.LinkArch{
|
||||
"amd64p32": &x86.Linkamd64p32,
|
||||
}
|
||||
|
||||
asm.Lexinit = lexinit
|
||||
asm.Cclean = cclean
|
||||
asm.Yyparse = yyparse
|
||||
|
||||
asm.Main()
|
||||
}
|
||||
|
||||
type yy struct{}
|
||||
|
||||
func (yy) Lex(v *yySymType) int {
|
||||
var av asm.Yylval
|
||||
tok := asm.Yylex(&av)
|
||||
v.sym = av.Sym
|
||||
v.lval = av.Lval
|
||||
v.sval = av.Sval
|
||||
v.dval = av.Dval
|
||||
return tok
|
||||
}
|
||||
|
||||
func (yy) Error(msg string) {
|
||||
asm.Yyerror("%s", msg)
|
||||
}
|
||||
|
||||
func yyparse() {
|
||||
yyParse(yy{})
|
||||
}
|
||||
|
||||
var lexinit = []asm.Lextab{
|
||||
{"SP", LSP, obj.NAME_AUTO},
|
||||
{"SB", LSB, obj.NAME_EXTERN},
|
||||
{"FP", LFP, obj.NAME_PARAM},
|
||||
{"PC", LPC, obj.TYPE_BRANCH},
|
||||
|
||||
{"AL", LBREG, x86.REG_AL},
|
||||
{"CL", LBREG, x86.REG_CL},
|
||||
{"DL", LBREG, x86.REG_DL},
|
||||
{"BL", LBREG, x86.REG_BL},
|
||||
/* "SPB", LBREG, REG_SPB, */
|
||||
{"SIB", LBREG, x86.REG_SIB},
|
||||
{"DIB", LBREG, x86.REG_DIB},
|
||||
{"BPB", LBREG, x86.REG_BPB},
|
||||
{"R8B", LBREG, x86.REG_R8B},
|
||||
{"R9B", LBREG, x86.REG_R9B},
|
||||
{"R10B", LBREG, x86.REG_R10B},
|
||||
{"R11B", LBREG, x86.REG_R11B},
|
||||
{"R12B", LBREG, x86.REG_R12B},
|
||||
{"R13B", LBREG, x86.REG_R13B},
|
||||
{"R14B", LBREG, x86.REG_R14B},
|
||||
{"R15B", LBREG, x86.REG_R15B},
|
||||
{"AH", LBREG, x86.REG_AH},
|
||||
{"CH", LBREG, x86.REG_CH},
|
||||
{"DH", LBREG, x86.REG_DH},
|
||||
{"BH", LBREG, x86.REG_BH},
|
||||
{"AX", LLREG, x86.REG_AX},
|
||||
{"CX", LLREG, x86.REG_CX},
|
||||
{"DX", LLREG, x86.REG_DX},
|
||||
{"BX", LLREG, x86.REG_BX},
|
||||
|
||||
/* "SP", LLREG, REG_SP, */
|
||||
{"BP", LLREG, x86.REG_BP},
|
||||
{"SI", LLREG, x86.REG_SI},
|
||||
{"DI", LLREG, x86.REG_DI},
|
||||
{"R8", LLREG, x86.REG_R8},
|
||||
{"R9", LLREG, x86.REG_R9},
|
||||
{"R10", LLREG, x86.REG_R10},
|
||||
{"R11", LLREG, x86.REG_R11},
|
||||
{"R12", LLREG, x86.REG_R12},
|
||||
{"R13", LLREG, x86.REG_R13},
|
||||
{"R14", LLREG, x86.REG_R14},
|
||||
{"R15", LLREG, x86.REG_R15},
|
||||
{"RARG", LLREG, x86.REGARG},
|
||||
{"F0", LFREG, x86.REG_F0 + 0},
|
||||
{"F1", LFREG, x86.REG_F0 + 1},
|
||||
{"F2", LFREG, x86.REG_F0 + 2},
|
||||
{"F3", LFREG, x86.REG_F0 + 3},
|
||||
{"F4", LFREG, x86.REG_F0 + 4},
|
||||
{"F5", LFREG, x86.REG_F0 + 5},
|
||||
{"F6", LFREG, x86.REG_F0 + 6},
|
||||
{"F7", LFREG, x86.REG_F0 + 7},
|
||||
{"M0", LMREG, x86.REG_M0 + 0},
|
||||
{"M1", LMREG, x86.REG_M0 + 1},
|
||||
{"M2", LMREG, x86.REG_M0 + 2},
|
||||
{"M3", LMREG, x86.REG_M0 + 3},
|
||||
{"M4", LMREG, x86.REG_M0 + 4},
|
||||
{"M5", LMREG, x86.REG_M0 + 5},
|
||||
{"M6", LMREG, x86.REG_M0 + 6},
|
||||
{"M7", LMREG, x86.REG_M0 + 7},
|
||||
{"X0", LXREG, x86.REG_X0 + 0},
|
||||
{"X1", LXREG, x86.REG_X0 + 1},
|
||||
{"X2", LXREG, x86.REG_X0 + 2},
|
||||
{"X3", LXREG, x86.REG_X0 + 3},
|
||||
{"X4", LXREG, x86.REG_X0 + 4},
|
||||
{"X5", LXREG, x86.REG_X0 + 5},
|
||||
{"X6", LXREG, x86.REG_X0 + 6},
|
||||
{"X7", LXREG, x86.REG_X0 + 7},
|
||||
{"X8", LXREG, x86.REG_X0 + 8},
|
||||
{"X9", LXREG, x86.REG_X0 + 9},
|
||||
{"X10", LXREG, x86.REG_X0 + 10},
|
||||
{"X11", LXREG, x86.REG_X0 + 11},
|
||||
{"X12", LXREG, x86.REG_X0 + 12},
|
||||
{"X13", LXREG, x86.REG_X0 + 13},
|
||||
{"X14", LXREG, x86.REG_X0 + 14},
|
||||
{"X15", LXREG, x86.REG_X0 + 15},
|
||||
{"CS", LSREG, x86.REG_CS},
|
||||
{"SS", LSREG, x86.REG_SS},
|
||||
{"DS", LSREG, x86.REG_DS},
|
||||
{"ES", LSREG, x86.REG_ES},
|
||||
{"FS", LSREG, x86.REG_FS},
|
||||
{"GS", LSREG, x86.REG_GS},
|
||||
{"GDTR", LBREG, x86.REG_GDTR},
|
||||
{"IDTR", LBREG, x86.REG_IDTR},
|
||||
{"LDTR", LBREG, x86.REG_LDTR},
|
||||
{"MSW", LBREG, x86.REG_MSW},
|
||||
{"TASK", LBREG, x86.REG_TASK},
|
||||
{"CR0", LBREG, x86.REG_CR + 0},
|
||||
{"CR1", LBREG, x86.REG_CR + 1},
|
||||
{"CR2", LBREG, x86.REG_CR + 2},
|
||||
{"CR3", LBREG, x86.REG_CR + 3},
|
||||
{"CR4", LBREG, x86.REG_CR + 4},
|
||||
{"CR5", LBREG, x86.REG_CR + 5},
|
||||
{"CR6", LBREG, x86.REG_CR + 6},
|
||||
{"CR7", LBREG, x86.REG_CR + 7},
|
||||
{"CR8", LBREG, x86.REG_CR + 8},
|
||||
{"CR9", LBREG, x86.REG_CR + 9},
|
||||
{"CR10", LBREG, x86.REG_CR + 10},
|
||||
{"CR11", LBREG, x86.REG_CR + 11},
|
||||
{"CR12", LBREG, x86.REG_CR + 12},
|
||||
{"CR13", LBREG, x86.REG_CR + 13},
|
||||
{"CR14", LBREG, x86.REG_CR + 14},
|
||||
{"CR15", LBREG, x86.REG_CR + 15},
|
||||
{"DR0", LBREG, x86.REG_DR + 0},
|
||||
{"DR1", LBREG, x86.REG_DR + 1},
|
||||
{"DR2", LBREG, x86.REG_DR + 2},
|
||||
{"DR3", LBREG, x86.REG_DR + 3},
|
||||
{"DR4", LBREG, x86.REG_DR + 4},
|
||||
{"DR5", LBREG, x86.REG_DR + 5},
|
||||
{"DR6", LBREG, x86.REG_DR + 6},
|
||||
{"DR7", LBREG, x86.REG_DR + 7},
|
||||
{"TR0", LBREG, x86.REG_TR + 0},
|
||||
{"TR1", LBREG, x86.REG_TR + 1},
|
||||
{"TR2", LBREG, x86.REG_TR + 2},
|
||||
{"TR3", LBREG, x86.REG_TR + 3},
|
||||
{"TR4", LBREG, x86.REG_TR + 4},
|
||||
{"TR5", LBREG, x86.REG_TR + 5},
|
||||
{"TR6", LBREG, x86.REG_TR + 6},
|
||||
{"TR7", LBREG, x86.REG_TR + 7},
|
||||
{"TLS", LSREG, x86.REG_TLS},
|
||||
{"AAA", LTYPE0, x86.AAAA},
|
||||
{"AAD", LTYPE0, x86.AAAD},
|
||||
{"AAM", LTYPE0, x86.AAAM},
|
||||
{"AAS", LTYPE0, x86.AAAS},
|
||||
{"ADCB", LTYPE3, x86.AADCB},
|
||||
{"ADCL", LTYPE3, x86.AADCL},
|
||||
{"ADCQ", LTYPE3, x86.AADCQ},
|
||||
{"ADCW", LTYPE3, x86.AADCW},
|
||||
{"ADDB", LTYPE3, x86.AADDB},
|
||||
{"ADDL", LTYPE3, x86.AADDL},
|
||||
{"ADDQ", LTYPE3, x86.AADDQ},
|
||||
{"ADDW", LTYPE3, x86.AADDW},
|
||||
{"ADJSP", LTYPE2, x86.AADJSP},
|
||||
{"ANDB", LTYPE3, x86.AANDB},
|
||||
{"ANDL", LTYPE3, x86.AANDL},
|
||||
{"ANDQ", LTYPE3, x86.AANDQ},
|
||||
{"ANDW", LTYPE3, x86.AANDW},
|
||||
{"ARPL", LTYPE3, x86.AARPL},
|
||||
{"BOUNDL", LTYPE3, x86.ABOUNDL},
|
||||
{"BOUNDW", LTYPE3, x86.ABOUNDW},
|
||||
{"BSFL", LTYPE3, x86.ABSFL},
|
||||
{"BSFQ", LTYPE3, x86.ABSFQ},
|
||||
{"BSFW", LTYPE3, x86.ABSFW},
|
||||
{"BSRL", LTYPE3, x86.ABSRL},
|
||||
{"BSRQ", LTYPE3, x86.ABSRQ},
|
||||
{"BSRW", LTYPE3, x86.ABSRW},
|
||||
{"BSWAPL", LTYPE1, x86.ABSWAPL},
|
||||
{"BSWAPQ", LTYPE1, x86.ABSWAPQ},
|
||||
{"BTCL", LTYPE3, x86.ABTCL},
|
||||
{"BTCQ", LTYPE3, x86.ABTCQ},
|
||||
{"BTCW", LTYPE3, x86.ABTCW},
|
||||
{"BTL", LTYPE3, x86.ABTL},
|
||||
{"BTQ", LTYPE3, x86.ABTQ},
|
||||
{"BTRL", LTYPE3, x86.ABTRL},
|
||||
{"BTRQ", LTYPE3, x86.ABTRQ},
|
||||
{"BTRW", LTYPE3, x86.ABTRW},
|
||||
{"BTSL", LTYPE3, x86.ABTSL},
|
||||
{"BTSQ", LTYPE3, x86.ABTSQ},
|
||||
{"BTSW", LTYPE3, x86.ABTSW},
|
||||
{"BTW", LTYPE3, x86.ABTW},
|
||||
{"BYTE", LTYPE2, x86.ABYTE},
|
||||
{"CALL", LTYPEC, obj.ACALL},
|
||||
{"CLC", LTYPE0, x86.ACLC},
|
||||
{"CLD", LTYPE0, x86.ACLD},
|
||||
{"CLI", LTYPE0, x86.ACLI},
|
||||
{"CLTS", LTYPE0, x86.ACLTS},
|
||||
{"CMC", LTYPE0, x86.ACMC},
|
||||
{"CMPB", LTYPE4, x86.ACMPB},
|
||||
{"CMPL", LTYPE4, x86.ACMPL},
|
||||
{"CMPQ", LTYPE4, x86.ACMPQ},
|
||||
{"CMPW", LTYPE4, x86.ACMPW},
|
||||
{"CMPSB", LTYPE0, x86.ACMPSB},
|
||||
{"CMPSL", LTYPE0, x86.ACMPSL},
|
||||
{"CMPSQ", LTYPE0, x86.ACMPSQ},
|
||||
{"CMPSW", LTYPE0, x86.ACMPSW},
|
||||
{"CMPXCHG8B", LTYPE1, x86.ACMPXCHG8B},
|
||||
{"CMPXCHGB", LTYPE3, x86.ACMPXCHGB}, /* LTYPE3? */
|
||||
{"CMPXCHGL", LTYPE3, x86.ACMPXCHGL},
|
||||
{"CMPXCHGQ", LTYPE3, x86.ACMPXCHGQ},
|
||||
{"CMPXCHGW", LTYPE3, x86.ACMPXCHGW},
|
||||
{"CPUID", LTYPE0, x86.ACPUID},
|
||||
{"DAA", LTYPE0, x86.ADAA},
|
||||
{"DAS", LTYPE0, x86.ADAS},
|
||||
{"DATA", LTYPED, obj.ADATA},
|
||||
{"DECB", LTYPE1, x86.ADECB},
|
||||
{"DECL", LTYPE1, x86.ADECL},
|
||||
{"DECQ", LTYPE1, x86.ADECQ},
|
||||
{"DECW", LTYPE1, x86.ADECW},
|
||||
{"DIVB", LTYPE2, x86.ADIVB},
|
||||
{"DIVL", LTYPE2, x86.ADIVL},
|
||||
{"DIVQ", LTYPE2, x86.ADIVQ},
|
||||
{"DIVW", LTYPE2, x86.ADIVW},
|
||||
{"EMMS", LTYPE0, x86.AEMMS},
|
||||
{"END", LTYPE0, obj.AEND},
|
||||
{"ENTER", LTYPE2, x86.AENTER},
|
||||
{"GLOBL", LTYPEG, obj.AGLOBL},
|
||||
{"HLT", LTYPE0, x86.AHLT},
|
||||
{"IDIVB", LTYPE2, x86.AIDIVB},
|
||||
{"IDIVL", LTYPE2, x86.AIDIVL},
|
||||
{"IDIVQ", LTYPE2, x86.AIDIVQ},
|
||||
{"IDIVW", LTYPE2, x86.AIDIVW},
|
||||
{"IMULB", LTYPEI, x86.AIMULB},
|
||||
{"IMULL", LTYPEI, x86.AIMULL},
|
||||
{"IMULQ", LTYPEI, x86.AIMULQ},
|
||||
{"IMUL3Q", LTYPEX, x86.AIMUL3Q},
|
||||
{"IMULW", LTYPEI, x86.AIMULW},
|
||||
{"INB", LTYPE0, x86.AINB},
|
||||
{"INL", LTYPE0, x86.AINL},
|
||||
{"INW", LTYPE0, x86.AINW},
|
||||
{"INCB", LTYPE1, x86.AINCB},
|
||||
{"INCL", LTYPE1, x86.AINCL},
|
||||
{"INCQ", LTYPE1, x86.AINCQ},
|
||||
{"INCW", LTYPE1, x86.AINCW},
|
||||
{"INSB", LTYPE0, x86.AINSB},
|
||||
{"INSL", LTYPE0, x86.AINSL},
|
||||
{"INSW", LTYPE0, x86.AINSW},
|
||||
{"INT", LTYPE2, x86.AINT},
|
||||
{"INTO", LTYPE0, x86.AINTO},
|
||||
{"INVD", LTYPE0, x86.AINVD},
|
||||
{"INVLPG", LTYPE2, x86.AINVLPG},
|
||||
{"IRETL", LTYPE0, x86.AIRETL},
|
||||
{"IRETQ", LTYPE0, x86.AIRETQ},
|
||||
{"IRETW", LTYPE0, x86.AIRETW},
|
||||
{"JOS", LTYPER, x86.AJOS}, /* overflow set (OF = 1) */
|
||||
{"JO", LTYPER, x86.AJOS}, /* alternate */
|
||||
{"JOC", LTYPER, x86.AJOC}, /* overflow clear (OF = 0) */
|
||||
{"JNO", LTYPER, x86.AJOC}, /* alternate */
|
||||
{"JCS", LTYPER, x86.AJCS}, /* carry set (CF = 1) */
|
||||
{"JB", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JC", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JNAE", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JLO", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JCC", LTYPER, x86.AJCC}, /* carry clear (CF = 0) */
|
||||
{"JAE", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JNB", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JNC", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JHS", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JEQ", LTYPER, x86.AJEQ}, /* equal (ZF = 1) */
|
||||
{"JE", LTYPER, x86.AJEQ}, /* alternate */
|
||||
{"JZ", LTYPER, x86.AJEQ}, /* alternate */
|
||||
{"JNE", LTYPER, x86.AJNE}, /* not equal (ZF = 0) */
|
||||
{"JNZ", LTYPER, x86.AJNE}, /* alternate */
|
||||
{"JLS", LTYPER, x86.AJLS}, /* lower or same (unsigned) (CF = 1 || ZF = 1) */
|
||||
{"JBE", LTYPER, x86.AJLS}, /* alternate */
|
||||
{"JNA", LTYPER, x86.AJLS}, /* alternate */
|
||||
{"JHI", LTYPER, x86.AJHI}, /* higher (unsigned) (CF = 0 && ZF = 0) */
|
||||
{"JA", LTYPER, x86.AJHI}, /* alternate */
|
||||
{"JNBE", LTYPER, x86.AJHI}, /* alternate */
|
||||
{"JMI", LTYPER, x86.AJMI}, /* negative (minus) (SF = 1) */
|
||||
{"JS", LTYPER, x86.AJMI}, /* alternate */
|
||||
{"JPL", LTYPER, x86.AJPL}, /* non-negative (plus) (SF = 0) */
|
||||
{"JNS", LTYPER, x86.AJPL}, /* alternate */
|
||||
{"JPS", LTYPER, x86.AJPS}, /* parity set (PF = 1) */
|
||||
{"JP", LTYPER, x86.AJPS}, /* alternate */
|
||||
{"JPE", LTYPER, x86.AJPS}, /* alternate */
|
||||
{"JPC", LTYPER, x86.AJPC}, /* parity clear (PF = 0) */
|
||||
{"JNP", LTYPER, x86.AJPC}, /* alternate */
|
||||
{"JPO", LTYPER, x86.AJPC}, /* alternate */
|
||||
{"JLT", LTYPER, x86.AJLT}, /* less than (signed) (SF != OF) */
|
||||
{"JL", LTYPER, x86.AJLT}, /* alternate */
|
||||
{"JNGE", LTYPER, x86.AJLT}, /* alternate */
|
||||
{"JGE", LTYPER, x86.AJGE}, /* greater than or equal (signed) (SF = OF) */
|
||||
{"JNL", LTYPER, x86.AJGE}, /* alternate */
|
||||
{"JLE", LTYPER, x86.AJLE}, /* less than or equal (signed) (ZF = 1 || SF != OF) */
|
||||
{"JNG", LTYPER, x86.AJLE}, /* alternate */
|
||||
{"JGT", LTYPER, x86.AJGT}, /* greater than (signed) (ZF = 0 && SF = OF) */
|
||||
{"JG", LTYPER, x86.AJGT}, /* alternate */
|
||||
{"JNLE", LTYPER, x86.AJGT}, /* alternate */
|
||||
{"JCXZL", LTYPER, x86.AJCXZL},
|
||||
{"JCXZQ", LTYPER, x86.AJCXZQ},
|
||||
{"JMP", LTYPEC, obj.AJMP},
|
||||
{"LAHF", LTYPE0, x86.ALAHF},
|
||||
{"LARL", LTYPE3, x86.ALARL},
|
||||
{"LARW", LTYPE3, x86.ALARW},
|
||||
{"LEAL", LTYPE3, x86.ALEAL},
|
||||
{"LEAQ", LTYPE3, x86.ALEAQ},
|
||||
{"LEAW", LTYPE3, x86.ALEAW},
|
||||
{"LEAVEL", LTYPE0, x86.ALEAVEL},
|
||||
{"LEAVEQ", LTYPE0, x86.ALEAVEQ},
|
||||
{"LEAVEW", LTYPE0, x86.ALEAVEW},
|
||||
{"LFENCE", LTYPE0, x86.ALFENCE},
|
||||
{"LOCK", LTYPE0, x86.ALOCK},
|
||||
{"LODSB", LTYPE0, x86.ALODSB},
|
||||
{"LODSL", LTYPE0, x86.ALODSL},
|
||||
{"LODSQ", LTYPE0, x86.ALODSQ},
|
||||
{"LODSW", LTYPE0, x86.ALODSW},
|
||||
{"LONG", LTYPE2, x86.ALONG},
|
||||
{"LOOP", LTYPER, x86.ALOOP},
|
||||
{"LOOPEQ", LTYPER, x86.ALOOPEQ},
|
||||
{"LOOPNE", LTYPER, x86.ALOOPNE},
|
||||
{"LSLL", LTYPE3, x86.ALSLL},
|
||||
{"LSLW", LTYPE3, x86.ALSLW},
|
||||
{"MFENCE", LTYPE0, x86.AMFENCE},
|
||||
{"MODE", LTYPE2, x86.AMODE},
|
||||
{"MOVB", LTYPE3, x86.AMOVB},
|
||||
{"MOVL", LTYPEM, x86.AMOVL},
|
||||
{"MOVQ", LTYPEM, x86.AMOVQ},
|
||||
{"MOVW", LTYPEM, x86.AMOVW},
|
||||
{"MOVBLSX", LTYPE3, x86.AMOVBLSX},
|
||||
{"MOVBLZX", LTYPE3, x86.AMOVBLZX},
|
||||
{"MOVBQSX", LTYPE3, x86.AMOVBQSX},
|
||||
{"MOVBQZX", LTYPE3, x86.AMOVBQZX},
|
||||
{"MOVBWSX", LTYPE3, x86.AMOVBWSX},
|
||||
{"MOVBWZX", LTYPE3, x86.AMOVBWZX},
|
||||
{"MOVLQSX", LTYPE3, x86.AMOVLQSX},
|
||||
{"MOVLQZX", LTYPE3, x86.AMOVLQZX},
|
||||
{"MOVNTIL", LTYPE3, x86.AMOVNTIL},
|
||||
{"MOVNTIQ", LTYPE3, x86.AMOVNTIQ},
|
||||
{"MOVQL", LTYPE3, x86.AMOVQL},
|
||||
{"MOVWLSX", LTYPE3, x86.AMOVWLSX},
|
||||
{"MOVWLZX", LTYPE3, x86.AMOVWLZX},
|
||||
{"MOVWQSX", LTYPE3, x86.AMOVWQSX},
|
||||
{"MOVWQZX", LTYPE3, x86.AMOVWQZX},
|
||||
{"MOVSB", LTYPE0, x86.AMOVSB},
|
||||
{"MOVSL", LTYPE0, x86.AMOVSL},
|
||||
{"MOVSQ", LTYPE0, x86.AMOVSQ},
|
||||
{"MOVSW", LTYPE0, x86.AMOVSW},
|
||||
{"MULB", LTYPE2, x86.AMULB},
|
||||
{"MULL", LTYPE2, x86.AMULL},
|
||||
{"MULQ", LTYPE2, x86.AMULQ},
|
||||
{"MULW", LTYPE2, x86.AMULW},
|
||||
{"NEGB", LTYPE1, x86.ANEGB},
|
||||
{"NEGL", LTYPE1, x86.ANEGL},
|
||||
{"NEGQ", LTYPE1, x86.ANEGQ},
|
||||
{"NEGW", LTYPE1, x86.ANEGW},
|
||||
{"NOP", LTYPEN, obj.ANOP},
|
||||
{"NOTB", LTYPE1, x86.ANOTB},
|
||||
{"NOTL", LTYPE1, x86.ANOTL},
|
||||
{"NOTQ", LTYPE1, x86.ANOTQ},
|
||||
{"NOTW", LTYPE1, x86.ANOTW},
|
||||
{"ORB", LTYPE3, x86.AORB},
|
||||
{"ORL", LTYPE3, x86.AORL},
|
||||
{"ORQ", LTYPE3, x86.AORQ},
|
||||
{"ORW", LTYPE3, x86.AORW},
|
||||
{"OUTB", LTYPE0, x86.AOUTB},
|
||||
{"OUTL", LTYPE0, x86.AOUTL},
|
||||
{"OUTW", LTYPE0, x86.AOUTW},
|
||||
{"OUTSB", LTYPE0, x86.AOUTSB},
|
||||
{"OUTSL", LTYPE0, x86.AOUTSL},
|
||||
{"OUTSW", LTYPE0, x86.AOUTSW},
|
||||
{"PAUSE", LTYPEN, x86.APAUSE},
|
||||
{"POPAL", LTYPE0, x86.APOPAL},
|
||||
{"POPAW", LTYPE0, x86.APOPAW},
|
||||
{"POPFL", LTYPE0, x86.APOPFL},
|
||||
{"POPFQ", LTYPE0, x86.APOPFQ},
|
||||
{"POPFW", LTYPE0, x86.APOPFW},
|
||||
{"POPL", LTYPE1, x86.APOPL},
|
||||
{"POPQ", LTYPE1, x86.APOPQ},
|
||||
{"POPW", LTYPE1, x86.APOPW},
|
||||
{"PUSHAL", LTYPE0, x86.APUSHAL},
|
||||
{"PUSHAW", LTYPE0, x86.APUSHAW},
|
||||
{"PUSHFL", LTYPE0, x86.APUSHFL},
|
||||
{"PUSHFQ", LTYPE0, x86.APUSHFQ},
|
||||
{"PUSHFW", LTYPE0, x86.APUSHFW},
|
||||
{"PUSHL", LTYPE2, x86.APUSHL},
|
||||
{"PUSHQ", LTYPE2, x86.APUSHQ},
|
||||
{"PUSHW", LTYPE2, x86.APUSHW},
|
||||
{"RCLB", LTYPE3, x86.ARCLB},
|
||||
{"RCLL", LTYPE3, x86.ARCLL},
|
||||
{"RCLQ", LTYPE3, x86.ARCLQ},
|
||||
{"RCLW", LTYPE3, x86.ARCLW},
|
||||
{"RCRB", LTYPE3, x86.ARCRB},
|
||||
{"RCRL", LTYPE3, x86.ARCRL},
|
||||
{"RCRQ", LTYPE3, x86.ARCRQ},
|
||||
{"RCRW", LTYPE3, x86.ARCRW},
|
||||
{"RDMSR", LTYPE0, x86.ARDMSR},
|
||||
{"RDPMC", LTYPE0, x86.ARDPMC},
|
||||
{"RDTSC", LTYPE0, x86.ARDTSC},
|
||||
{"REP", LTYPE0, x86.AREP},
|
||||
{"REPN", LTYPE0, x86.AREPN},
|
||||
{"RET", LTYPE0, obj.ARET},
|
||||
{"RETFL", LTYPERT, x86.ARETFL},
|
||||
{"RETFW", LTYPERT, x86.ARETFW},
|
||||
{"RETFQ", LTYPERT, x86.ARETFQ},
|
||||
{"ROLB", LTYPE3, x86.AROLB},
|
||||
{"ROLL", LTYPE3, x86.AROLL},
|
||||
{"ROLQ", LTYPE3, x86.AROLQ},
|
||||
{"ROLW", LTYPE3, x86.AROLW},
|
||||
{"RORB", LTYPE3, x86.ARORB},
|
||||
{"RORL", LTYPE3, x86.ARORL},
|
||||
{"RORQ", LTYPE3, x86.ARORQ},
|
||||
{"RORW", LTYPE3, x86.ARORW},
|
||||
{"RSM", LTYPE0, x86.ARSM},
|
||||
{"SAHF", LTYPE0, x86.ASAHF},
|
||||
{"SALB", LTYPE3, x86.ASALB},
|
||||
{"SALL", LTYPE3, x86.ASALL},
|
||||
{"SALQ", LTYPE3, x86.ASALQ},
|
||||
{"SALW", LTYPE3, x86.ASALW},
|
||||
{"SARB", LTYPE3, x86.ASARB},
|
||||
{"SARL", LTYPE3, x86.ASARL},
|
||||
{"SARQ", LTYPE3, x86.ASARQ},
|
||||
{"SARW", LTYPE3, x86.ASARW},
|
||||
{"SBBB", LTYPE3, x86.ASBBB},
|
||||
{"SBBL", LTYPE3, x86.ASBBL},
|
||||
{"SBBQ", LTYPE3, x86.ASBBQ},
|
||||
{"SBBW", LTYPE3, x86.ASBBW},
|
||||
{"SCASB", LTYPE0, x86.ASCASB},
|
||||
{"SCASL", LTYPE0, x86.ASCASL},
|
||||
{"SCASQ", LTYPE0, x86.ASCASQ},
|
||||
{"SCASW", LTYPE0, x86.ASCASW},
|
||||
{"SETCC", LTYPE1, x86.ASETCC}, /* see JCC etc above for condition codes */
|
||||
{"SETCS", LTYPE1, x86.ASETCS},
|
||||
{"SETEQ", LTYPE1, x86.ASETEQ},
|
||||
{"SETGE", LTYPE1, x86.ASETGE},
|
||||
{"SETGT", LTYPE1, x86.ASETGT},
|
||||
{"SETHI", LTYPE1, x86.ASETHI},
|
||||
{"SETLE", LTYPE1, x86.ASETLE},
|
||||
{"SETLS", LTYPE1, x86.ASETLS},
|
||||
{"SETLT", LTYPE1, x86.ASETLT},
|
||||
{"SETMI", LTYPE1, x86.ASETMI},
|
||||
{"SETNE", LTYPE1, x86.ASETNE},
|
||||
{"SETOC", LTYPE1, x86.ASETOC},
|
||||
{"SETOS", LTYPE1, x86.ASETOS},
|
||||
{"SETPC", LTYPE1, x86.ASETPC},
|
||||
{"SETPL", LTYPE1, x86.ASETPL},
|
||||
{"SETPS", LTYPE1, x86.ASETPS},
|
||||
{"SFENCE", LTYPE0, x86.ASFENCE},
|
||||
{"CDQ", LTYPE0, x86.ACDQ},
|
||||
{"CWD", LTYPE0, x86.ACWD},
|
||||
{"CQO", LTYPE0, x86.ACQO},
|
||||
{"SHLB", LTYPE3, x86.ASHLB},
|
||||
{"SHLL", LTYPES, x86.ASHLL},
|
||||
{"SHLQ", LTYPES, x86.ASHLQ},
|
||||
{"SHLW", LTYPES, x86.ASHLW},
|
||||
{"SHRB", LTYPE3, x86.ASHRB},
|
||||
{"SHRL", LTYPES, x86.ASHRL},
|
||||
{"SHRQ", LTYPES, x86.ASHRQ},
|
||||
{"SHRW", LTYPES, x86.ASHRW},
|
||||
{"STC", LTYPE0, x86.ASTC},
|
||||
{"STD", LTYPE0, x86.ASTD},
|
||||
{"STI", LTYPE0, x86.ASTI},
|
||||
{"STOSB", LTYPE0, x86.ASTOSB},
|
||||
{"STOSL", LTYPE0, x86.ASTOSL},
|
||||
{"STOSQ", LTYPE0, x86.ASTOSQ},
|
||||
{"STOSW", LTYPE0, x86.ASTOSW},
|
||||
{"SUBB", LTYPE3, x86.ASUBB},
|
||||
{"SUBL", LTYPE3, x86.ASUBL},
|
||||
{"SUBQ", LTYPE3, x86.ASUBQ},
|
||||
{"SUBW", LTYPE3, x86.ASUBW},
|
||||
{"SYSCALL", LTYPE0, x86.ASYSCALL},
|
||||
{"SYSRET", LTYPE0, x86.ASYSRET},
|
||||
{"SWAPGS", LTYPE0, x86.ASWAPGS},
|
||||
{"TESTB", LTYPE3, x86.ATESTB},
|
||||
{"TESTL", LTYPE3, x86.ATESTL},
|
||||
{"TESTQ", LTYPE3, x86.ATESTQ},
|
||||
{"TESTW", LTYPE3, x86.ATESTW},
|
||||
{"TEXT", LTYPET, obj.ATEXT},
|
||||
{"VERR", LTYPE2, x86.AVERR},
|
||||
{"VERW", LTYPE2, x86.AVERW},
|
||||
{"QUAD", LTYPE2, x86.AQUAD},
|
||||
{"WAIT", LTYPE0, x86.AWAIT},
|
||||
{"WBINVD", LTYPE0, x86.AWBINVD},
|
||||
{"WRMSR", LTYPE0, x86.AWRMSR},
|
||||
{"WORD", LTYPE2, x86.AWORD},
|
||||
{"XADDB", LTYPE3, x86.AXADDB},
|
||||
{"XADDL", LTYPE3, x86.AXADDL},
|
||||
{"XADDQ", LTYPE3, x86.AXADDQ},
|
||||
{"XADDW", LTYPE3, x86.AXADDW},
|
||||
{"XCHGB", LTYPE3, x86.AXCHGB},
|
||||
{"XCHGL", LTYPE3, x86.AXCHGL},
|
||||
{"XCHGQ", LTYPE3, x86.AXCHGQ},
|
||||
{"XCHGW", LTYPE3, x86.AXCHGW},
|
||||
{"XLAT", LTYPE2, x86.AXLAT},
|
||||
{"XORB", LTYPE3, x86.AXORB},
|
||||
{"XORL", LTYPE3, x86.AXORL},
|
||||
{"XORQ", LTYPE3, x86.AXORQ},
|
||||
{"XORW", LTYPE3, x86.AXORW},
|
||||
{"CMOVLCC", LTYPE3, x86.ACMOVLCC},
|
||||
{"CMOVLCS", LTYPE3, x86.ACMOVLCS},
|
||||
{"CMOVLEQ", LTYPE3, x86.ACMOVLEQ},
|
||||
{"CMOVLGE", LTYPE3, x86.ACMOVLGE},
|
||||
{"CMOVLGT", LTYPE3, x86.ACMOVLGT},
|
||||
{"CMOVLHI", LTYPE3, x86.ACMOVLHI},
|
||||
{"CMOVLLE", LTYPE3, x86.ACMOVLLE},
|
||||
{"CMOVLLS", LTYPE3, x86.ACMOVLLS},
|
||||
{"CMOVLLT", LTYPE3, x86.ACMOVLLT},
|
||||
{"CMOVLMI", LTYPE3, x86.ACMOVLMI},
|
||||
{"CMOVLNE", LTYPE3, x86.ACMOVLNE},
|
||||
{"CMOVLOC", LTYPE3, x86.ACMOVLOC},
|
||||
{"CMOVLOS", LTYPE3, x86.ACMOVLOS},
|
||||
{"CMOVLPC", LTYPE3, x86.ACMOVLPC},
|
||||
{"CMOVLPL", LTYPE3, x86.ACMOVLPL},
|
||||
{"CMOVLPS", LTYPE3, x86.ACMOVLPS},
|
||||
{"CMOVQCC", LTYPE3, x86.ACMOVQCC},
|
||||
{"CMOVQCS", LTYPE3, x86.ACMOVQCS},
|
||||
{"CMOVQEQ", LTYPE3, x86.ACMOVQEQ},
|
||||
{"CMOVQGE", LTYPE3, x86.ACMOVQGE},
|
||||
{"CMOVQGT", LTYPE3, x86.ACMOVQGT},
|
||||
{"CMOVQHI", LTYPE3, x86.ACMOVQHI},
|
||||
{"CMOVQLE", LTYPE3, x86.ACMOVQLE},
|
||||
{"CMOVQLS", LTYPE3, x86.ACMOVQLS},
|
||||
{"CMOVQLT", LTYPE3, x86.ACMOVQLT},
|
||||
{"CMOVQMI", LTYPE3, x86.ACMOVQMI},
|
||||
{"CMOVQNE", LTYPE3, x86.ACMOVQNE},
|
||||
{"CMOVQOC", LTYPE3, x86.ACMOVQOC},
|
||||
{"CMOVQOS", LTYPE3, x86.ACMOVQOS},
|
||||
{"CMOVQPC", LTYPE3, x86.ACMOVQPC},
|
||||
{"CMOVQPL", LTYPE3, x86.ACMOVQPL},
|
||||
{"CMOVQPS", LTYPE3, x86.ACMOVQPS},
|
||||
{"CMOVWCC", LTYPE3, x86.ACMOVWCC},
|
||||
{"CMOVWCS", LTYPE3, x86.ACMOVWCS},
|
||||
{"CMOVWEQ", LTYPE3, x86.ACMOVWEQ},
|
||||
{"CMOVWGE", LTYPE3, x86.ACMOVWGE},
|
||||
{"CMOVWGT", LTYPE3, x86.ACMOVWGT},
|
||||
{"CMOVWHI", LTYPE3, x86.ACMOVWHI},
|
||||
{"CMOVWLE", LTYPE3, x86.ACMOVWLE},
|
||||
{"CMOVWLS", LTYPE3, x86.ACMOVWLS},
|
||||
{"CMOVWLT", LTYPE3, x86.ACMOVWLT},
|
||||
{"CMOVWMI", LTYPE3, x86.ACMOVWMI},
|
||||
{"CMOVWNE", LTYPE3, x86.ACMOVWNE},
|
||||
{"CMOVWOC", LTYPE3, x86.ACMOVWOC},
|
||||
{"CMOVWOS", LTYPE3, x86.ACMOVWOS},
|
||||
{"CMOVWPC", LTYPE3, x86.ACMOVWPC},
|
||||
{"CMOVWPL", LTYPE3, x86.ACMOVWPL},
|
||||
{"CMOVWPS", LTYPE3, x86.ACMOVWPS},
|
||||
{"FMOVB", LTYPE3, x86.AFMOVB},
|
||||
{"FMOVBP", LTYPE3, x86.AFMOVBP},
|
||||
{"FMOVD", LTYPE3, x86.AFMOVD},
|
||||
{"FMOVDP", LTYPE3, x86.AFMOVDP},
|
||||
{"FMOVF", LTYPE3, x86.AFMOVF},
|
||||
{"FMOVFP", LTYPE3, x86.AFMOVFP},
|
||||
{"FMOVL", LTYPE3, x86.AFMOVL},
|
||||
{"FMOVLP", LTYPE3, x86.AFMOVLP},
|
||||
{"FMOVV", LTYPE3, x86.AFMOVV},
|
||||
{"FMOVVP", LTYPE3, x86.AFMOVVP},
|
||||
{"FMOVW", LTYPE3, x86.AFMOVW},
|
||||
{"FMOVWP", LTYPE3, x86.AFMOVWP},
|
||||
{"FMOVX", LTYPE3, x86.AFMOVX},
|
||||
{"FMOVXP", LTYPE3, x86.AFMOVXP},
|
||||
{"FCOMB", LTYPE3, x86.AFCOMB},
|
||||
{"FCOMBP", LTYPE3, x86.AFCOMBP},
|
||||
{"FCOMD", LTYPE3, x86.AFCOMD},
|
||||
{"FCOMDP", LTYPE3, x86.AFCOMDP},
|
||||
{"FCOMDPP", LTYPE3, x86.AFCOMDPP},
|
||||
{"FCOMF", LTYPE3, x86.AFCOMF},
|
||||
{"FCOMFP", LTYPE3, x86.AFCOMFP},
|
||||
{"FCOML", LTYPE3, x86.AFCOML},
|
||||
{"FCOMLP", LTYPE3, x86.AFCOMLP},
|
||||
{"FCOMW", LTYPE3, x86.AFCOMW},
|
||||
{"FCOMWP", LTYPE3, x86.AFCOMWP},
|
||||
{"FUCOM", LTYPE3, x86.AFUCOM},
|
||||
{"FUCOMP", LTYPE3, x86.AFUCOMP},
|
||||
{"FUCOMPP", LTYPE3, x86.AFUCOMPP},
|
||||
{"FADDW", LTYPE3, x86.AFADDW},
|
||||
{"FADDL", LTYPE3, x86.AFADDL},
|
||||
{"FADDF", LTYPE3, x86.AFADDF},
|
||||
{"FADDD", LTYPE3, x86.AFADDD},
|
||||
{"FADDDP", LTYPE3, x86.AFADDDP},
|
||||
{"FSUBDP", LTYPE3, x86.AFSUBDP},
|
||||
{"FSUBW", LTYPE3, x86.AFSUBW},
|
||||
{"FSUBL", LTYPE3, x86.AFSUBL},
|
||||
{"FSUBF", LTYPE3, x86.AFSUBF},
|
||||
{"FSUBD", LTYPE3, x86.AFSUBD},
|
||||
{"FSUBRDP", LTYPE3, x86.AFSUBRDP},
|
||||
{"FSUBRW", LTYPE3, x86.AFSUBRW},
|
||||
{"FSUBRL", LTYPE3, x86.AFSUBRL},
|
||||
{"FSUBRF", LTYPE3, x86.AFSUBRF},
|
||||
{"FSUBRD", LTYPE3, x86.AFSUBRD},
|
||||
{"FMULDP", LTYPE3, x86.AFMULDP},
|
||||
{"FMULW", LTYPE3, x86.AFMULW},
|
||||
{"FMULL", LTYPE3, x86.AFMULL},
|
||||
{"FMULF", LTYPE3, x86.AFMULF},
|
||||
{"FMULD", LTYPE3, x86.AFMULD},
|
||||
{"FDIVDP", LTYPE3, x86.AFDIVDP},
|
||||
{"FDIVW", LTYPE3, x86.AFDIVW},
|
||||
{"FDIVL", LTYPE3, x86.AFDIVL},
|
||||
{"FDIVF", LTYPE3, x86.AFDIVF},
|
||||
{"FDIVD", LTYPE3, x86.AFDIVD},
|
||||
{"FDIVRDP", LTYPE3, x86.AFDIVRDP},
|
||||
{"FDIVRW", LTYPE3, x86.AFDIVRW},
|
||||
{"FDIVRL", LTYPE3, x86.AFDIVRL},
|
||||
{"FDIVRF", LTYPE3, x86.AFDIVRF},
|
||||
{"FDIVRD", LTYPE3, x86.AFDIVRD},
|
||||
{"FXCHD", LTYPE3, x86.AFXCHD},
|
||||
{"FFREE", LTYPE1, x86.AFFREE},
|
||||
{"FLDCW", LTYPE2, x86.AFLDCW},
|
||||
{"FLDENV", LTYPE1, x86.AFLDENV},
|
||||
{"FRSTOR", LTYPE2, x86.AFRSTOR},
|
||||
{"FSAVE", LTYPE1, x86.AFSAVE},
|
||||
{"FSTCW", LTYPE1, x86.AFSTCW},
|
||||
{"FSTENV", LTYPE1, x86.AFSTENV},
|
||||
{"FSTSW", LTYPE1, x86.AFSTSW},
|
||||
{"F2XM1", LTYPE0, x86.AF2XM1},
|
||||
{"FABS", LTYPE0, x86.AFABS},
|
||||
{"FCHS", LTYPE0, x86.AFCHS},
|
||||
{"FCLEX", LTYPE0, x86.AFCLEX},
|
||||
{"FCOS", LTYPE0, x86.AFCOS},
|
||||
{"FDECSTP", LTYPE0, x86.AFDECSTP},
|
||||
{"FINCSTP", LTYPE0, x86.AFINCSTP},
|
||||
{"FINIT", LTYPE0, x86.AFINIT},
|
||||
{"FLD1", LTYPE0, x86.AFLD1},
|
||||
{"FLDL2E", LTYPE0, x86.AFLDL2E},
|
||||
{"FLDL2T", LTYPE0, x86.AFLDL2T},
|
||||
{"FLDLG2", LTYPE0, x86.AFLDLG2},
|
||||
{"FLDLN2", LTYPE0, x86.AFLDLN2},
|
||||
{"FLDPI", LTYPE0, x86.AFLDPI},
|
||||
{"FLDZ", LTYPE0, x86.AFLDZ},
|
||||
{"FNOP", LTYPE0, x86.AFNOP},
|
||||
{"FPATAN", LTYPE0, x86.AFPATAN},
|
||||
{"FPREM", LTYPE0, x86.AFPREM},
|
||||
{"FPREM1", LTYPE0, x86.AFPREM1},
|
||||
{"FPTAN", LTYPE0, x86.AFPTAN},
|
||||
{"FRNDINT", LTYPE0, x86.AFRNDINT},
|
||||
{"FSCALE", LTYPE0, x86.AFSCALE},
|
||||
{"FSIN", LTYPE0, x86.AFSIN},
|
||||
{"FSINCOS", LTYPE0, x86.AFSINCOS},
|
||||
{"FSQRT", LTYPE0, x86.AFSQRT},
|
||||
{"FTST", LTYPE0, x86.AFTST},
|
||||
{"FXAM", LTYPE0, x86.AFXAM},
|
||||
{"FXTRACT", LTYPE0, x86.AFXTRACT},
|
||||
{"FYL2X", LTYPE0, x86.AFYL2X},
|
||||
{"FYL2XP1", LTYPE0, x86.AFYL2XP1},
|
||||
{"ADDPD", LTYPE3, x86.AADDPD},
|
||||
{"ADDPS", LTYPE3, x86.AADDPS},
|
||||
{"ADDSD", LTYPE3, x86.AADDSD},
|
||||
{"ADDSS", LTYPE3, x86.AADDSS},
|
||||
{"ANDNPD", LTYPE3, x86.AANDNPD},
|
||||
{"ANDNPS", LTYPE3, x86.AANDNPS},
|
||||
{"ANDPD", LTYPE3, x86.AANDPD},
|
||||
{"ANDPS", LTYPE3, x86.AANDPS},
|
||||
{"CMPPD", LTYPEXC, x86.ACMPPD},
|
||||
{"CMPPS", LTYPEXC, x86.ACMPPS},
|
||||
{"CMPSD", LTYPEXC, x86.ACMPSD},
|
||||
{"CMPSS", LTYPEXC, x86.ACMPSS},
|
||||
{"COMISD", LTYPE3, x86.ACOMISD},
|
||||
{"COMISS", LTYPE3, x86.ACOMISS},
|
||||
{"CVTPL2PD", LTYPE3, x86.ACVTPL2PD},
|
||||
{"CVTPL2PS", LTYPE3, x86.ACVTPL2PS},
|
||||
{"CVTPD2PL", LTYPE3, x86.ACVTPD2PL},
|
||||
{"CVTPD2PS", LTYPE3, x86.ACVTPD2PS},
|
||||
{"CVTPS2PL", LTYPE3, x86.ACVTPS2PL},
|
||||
{"PF2IW", LTYPE3, x86.APF2IW},
|
||||
{"PF2IL", LTYPE3, x86.APF2IL},
|
||||
{"PF2ID", LTYPE3, x86.APF2IL}, /* syn */
|
||||
{"PI2FL", LTYPE3, x86.API2FL},
|
||||
{"PI2FD", LTYPE3, x86.API2FL}, /* syn */
|
||||
{"PI2FW", LTYPE3, x86.API2FW},
|
||||
{"CVTPS2PD", LTYPE3, x86.ACVTPS2PD},
|
||||
{"CVTSD2SL", LTYPE3, x86.ACVTSD2SL},
|
||||
{"CVTSD2SQ", LTYPE3, x86.ACVTSD2SQ},
|
||||
{"CVTSD2SS", LTYPE3, x86.ACVTSD2SS},
|
||||
{"CVTSL2SD", LTYPE3, x86.ACVTSL2SD},
|
||||
{"CVTSQ2SD", LTYPE3, x86.ACVTSQ2SD},
|
||||
{"CVTSL2SS", LTYPE3, x86.ACVTSL2SS},
|
||||
{"CVTSQ2SS", LTYPE3, x86.ACVTSQ2SS},
|
||||
{"CVTSS2SD", LTYPE3, x86.ACVTSS2SD},
|
||||
{"CVTSS2SL", LTYPE3, x86.ACVTSS2SL},
|
||||
{"CVTSS2SQ", LTYPE3, x86.ACVTSS2SQ},
|
||||
{"CVTTPD2PL", LTYPE3, x86.ACVTTPD2PL},
|
||||
{"CVTTPS2PL", LTYPE3, x86.ACVTTPS2PL},
|
||||
{"CVTTSD2SL", LTYPE3, x86.ACVTTSD2SL},
|
||||
{"CVTTSD2SQ", LTYPE3, x86.ACVTTSD2SQ},
|
||||
{"CVTTSS2SL", LTYPE3, x86.ACVTTSS2SL},
|
||||
{"CVTTSS2SQ", LTYPE3, x86.ACVTTSS2SQ},
|
||||
{"DIVPD", LTYPE3, x86.ADIVPD},
|
||||
{"DIVPS", LTYPE3, x86.ADIVPS},
|
||||
{"DIVSD", LTYPE3, x86.ADIVSD},
|
||||
{"DIVSS", LTYPE3, x86.ADIVSS},
|
||||
{"FXRSTOR", LTYPE2, x86.AFXRSTOR},
|
||||
{"FXRSTOR64", LTYPE2, x86.AFXRSTOR64},
|
||||
{"FXSAVE", LTYPE1, x86.AFXSAVE},
|
||||
{"FXSAVE64", LTYPE1, x86.AFXSAVE64},
|
||||
{"LDMXCSR", LTYPE2, x86.ALDMXCSR},
|
||||
{"MASKMOVOU", LTYPE3, x86.AMASKMOVOU},
|
||||
{"MASKMOVDQU", LTYPE3, x86.AMASKMOVOU}, /* syn */
|
||||
{"MASKMOVQ", LTYPE3, x86.AMASKMOVQ},
|
||||
{"MAXPD", LTYPE3, x86.AMAXPD},
|
||||
{"MAXPS", LTYPE3, x86.AMAXPS},
|
||||
{"MAXSD", LTYPE3, x86.AMAXSD},
|
||||
{"MAXSS", LTYPE3, x86.AMAXSS},
|
||||
{"MINPD", LTYPE3, x86.AMINPD},
|
||||
{"MINPS", LTYPE3, x86.AMINPS},
|
||||
{"MINSD", LTYPE3, x86.AMINSD},
|
||||
{"MINSS", LTYPE3, x86.AMINSS},
|
||||
{"MOVAPD", LTYPE3, x86.AMOVAPD},
|
||||
{"MOVAPS", LTYPE3, x86.AMOVAPS},
|
||||
{"MOVD", LTYPE3, x86.AMOVQ}, /* syn */
|
||||
{"MOVDQ2Q", LTYPE3, x86.AMOVQ}, /* syn */
|
||||
{"MOVO", LTYPE3, x86.AMOVO},
|
||||
{"MOVOA", LTYPE3, x86.AMOVO}, /* syn */
|
||||
{"MOVOU", LTYPE3, x86.AMOVOU},
|
||||
{"MOVHLPS", LTYPE3, x86.AMOVHLPS},
|
||||
{"MOVHPD", LTYPE3, x86.AMOVHPD},
|
||||
{"MOVHPS", LTYPE3, x86.AMOVHPS},
|
||||
{"MOVLHPS", LTYPE3, x86.AMOVLHPS},
|
||||
{"MOVLPD", LTYPE3, x86.AMOVLPD},
|
||||
{"MOVLPS", LTYPE3, x86.AMOVLPS},
|
||||
{"MOVMSKPD", LTYPE3, x86.AMOVMSKPD},
|
||||
{"MOVMSKPS", LTYPE3, x86.AMOVMSKPS},
|
||||
{"MOVNTO", LTYPE3, x86.AMOVNTO},
|
||||
{"MOVNTDQ", LTYPE3, x86.AMOVNTO}, /* syn */
|
||||
{"MOVNTPD", LTYPE3, x86.AMOVNTPD},
|
||||
{"MOVNTPS", LTYPE3, x86.AMOVNTPS},
|
||||
{"MOVNTQ", LTYPE3, x86.AMOVNTQ},
|
||||
{"MOVQOZX", LTYPE3, x86.AMOVQOZX},
|
||||
{"MOVSD", LTYPE3, x86.AMOVSD},
|
||||
{"MOVSS", LTYPE3, x86.AMOVSS},
|
||||
{"MOVUPD", LTYPE3, x86.AMOVUPD},
|
||||
{"MOVUPS", LTYPE3, x86.AMOVUPS},
|
||||
{"MULPD", LTYPE3, x86.AMULPD},
|
||||
{"MULPS", LTYPE3, x86.AMULPS},
|
||||
{"MULSD", LTYPE3, x86.AMULSD},
|
||||
{"MULSS", LTYPE3, x86.AMULSS},
|
||||
{"ORPD", LTYPE3, x86.AORPD},
|
||||
{"ORPS", LTYPE3, x86.AORPS},
|
||||
{"PACKSSLW", LTYPE3, x86.APACKSSLW},
|
||||
{"PACKSSWB", LTYPE3, x86.APACKSSWB},
|
||||
{"PACKUSWB", LTYPE3, x86.APACKUSWB},
|
||||
{"PADDB", LTYPE3, x86.APADDB},
|
||||
{"PADDL", LTYPE3, x86.APADDL},
|
||||
{"PADDQ", LTYPE3, x86.APADDQ},
|
||||
{"PADDSB", LTYPE3, x86.APADDSB},
|
||||
{"PADDSW", LTYPE3, x86.APADDSW},
|
||||
{"PADDUSB", LTYPE3, x86.APADDUSB},
|
||||
{"PADDUSW", LTYPE3, x86.APADDUSW},
|
||||
{"PADDW", LTYPE3, x86.APADDW},
|
||||
{"PAND", LTYPE3, x86.APAND},
|
||||
{"PANDB", LTYPE3, x86.APANDB},
|
||||
{"PANDL", LTYPE3, x86.APANDL},
|
||||
{"PANDSB", LTYPE3, x86.APANDSB},
|
||||
{"PANDSW", LTYPE3, x86.APANDSW},
|
||||
{"PANDUSB", LTYPE3, x86.APANDUSB},
|
||||
{"PANDUSW", LTYPE3, x86.APANDUSW},
|
||||
{"PANDW", LTYPE3, x86.APANDW},
|
||||
{"PANDN", LTYPE3, x86.APANDN},
|
||||
{"PAVGB", LTYPE3, x86.APAVGB},
|
||||
{"PAVGW", LTYPE3, x86.APAVGW},
|
||||
{"PCMPEQB", LTYPE3, x86.APCMPEQB},
|
||||
{"PCMPEQL", LTYPE3, x86.APCMPEQL},
|
||||
{"PCMPEQW", LTYPE3, x86.APCMPEQW},
|
||||
{"PCMPGTB", LTYPE3, x86.APCMPGTB},
|
||||
{"PCMPGTL", LTYPE3, x86.APCMPGTL},
|
||||
{"PCMPGTW", LTYPE3, x86.APCMPGTW},
|
||||
{"PEXTRW", LTYPEX, x86.APEXTRW},
|
||||
{"PINSRW", LTYPEX, x86.APINSRW},
|
||||
{"PINSRD", LTYPEX, x86.APINSRD},
|
||||
{"PINSRQ", LTYPEX, x86.APINSRQ},
|
||||
{"PMADDWL", LTYPE3, x86.APMADDWL},
|
||||
{"PMAXSW", LTYPE3, x86.APMAXSW},
|
||||
{"PMAXUB", LTYPE3, x86.APMAXUB},
|
||||
{"PMINSW", LTYPE3, x86.APMINSW},
|
||||
{"PMINUB", LTYPE3, x86.APMINUB},
|
||||
{"PMOVMSKB", LTYPE3, x86.APMOVMSKB},
|
||||
{"PMULHRW", LTYPE3, x86.APMULHRW},
|
||||
{"PMULHUW", LTYPE3, x86.APMULHUW},
|
||||
{"PMULHW", LTYPE3, x86.APMULHW},
|
||||
{"PMULLW", LTYPE3, x86.APMULLW},
|
||||
{"PMULULQ", LTYPE3, x86.APMULULQ},
|
||||
{"POR", LTYPE3, x86.APOR},
|
||||
{"PSADBW", LTYPE3, x86.APSADBW},
|
||||
{"PSHUFHW", LTYPEX, x86.APSHUFHW},
|
||||
{"PSHUFL", LTYPEX, x86.APSHUFL},
|
||||
{"PSHUFLW", LTYPEX, x86.APSHUFLW},
|
||||
{"PSHUFW", LTYPEX, x86.APSHUFW},
|
||||
{"PSHUFB", LTYPEM, x86.APSHUFB},
|
||||
{"PSLLO", LTYPE3, x86.APSLLO},
|
||||
{"PSLLDQ", LTYPE3, x86.APSLLO}, /* syn */
|
||||
{"PSLLL", LTYPE3, x86.APSLLL},
|
||||
{"PSLLQ", LTYPE3, x86.APSLLQ},
|
||||
{"PSLLW", LTYPE3, x86.APSLLW},
|
||||
{"PSRAL", LTYPE3, x86.APSRAL},
|
||||
{"PSRAW", LTYPE3, x86.APSRAW},
|
||||
{"PSRLO", LTYPE3, x86.APSRLO},
|
||||
{"PSRLDQ", LTYPE3, x86.APSRLO}, /* syn */
|
||||
{"PSRLL", LTYPE3, x86.APSRLL},
|
||||
{"PSRLQ", LTYPE3, x86.APSRLQ},
|
||||
{"PSRLW", LTYPE3, x86.APSRLW},
|
||||
{"PSUBB", LTYPE3, x86.APSUBB},
|
||||
{"PSUBL", LTYPE3, x86.APSUBL},
|
||||
{"PSUBQ", LTYPE3, x86.APSUBQ},
|
||||
{"PSUBSB", LTYPE3, x86.APSUBSB},
|
||||
{"PSUBSW", LTYPE3, x86.APSUBSW},
|
||||
{"PSUBUSB", LTYPE3, x86.APSUBUSB},
|
||||
{"PSUBUSW", LTYPE3, x86.APSUBUSW},
|
||||
{"PSUBW", LTYPE3, x86.APSUBW},
|
||||
{"PUNPCKHBW", LTYPE3, x86.APUNPCKHBW},
|
||||
{"PUNPCKHLQ", LTYPE3, x86.APUNPCKHLQ},
|
||||
{"PUNPCKHQDQ", LTYPE3, x86.APUNPCKHQDQ},
|
||||
{"PUNPCKHWL", LTYPE3, x86.APUNPCKHWL},
|
||||
{"PUNPCKLBW", LTYPE3, x86.APUNPCKLBW},
|
||||
{"PUNPCKLLQ", LTYPE3, x86.APUNPCKLLQ},
|
||||
{"PUNPCKLQDQ", LTYPE3, x86.APUNPCKLQDQ},
|
||||
{"PUNPCKLWL", LTYPE3, x86.APUNPCKLWL},
|
||||
{"PXOR", LTYPE3, x86.APXOR},
|
||||
{"RCPPS", LTYPE3, x86.ARCPPS},
|
||||
{"RCPSS", LTYPE3, x86.ARCPSS},
|
||||
{"RSQRTPS", LTYPE3, x86.ARSQRTPS},
|
||||
{"RSQRTSS", LTYPE3, x86.ARSQRTSS},
|
||||
{"SHUFPD", LTYPEX, x86.ASHUFPD},
|
||||
{"SHUFPS", LTYPEX, x86.ASHUFPS},
|
||||
{"SQRTPD", LTYPE3, x86.ASQRTPD},
|
||||
{"SQRTPS", LTYPE3, x86.ASQRTPS},
|
||||
{"SQRTSD", LTYPE3, x86.ASQRTSD},
|
||||
{"SQRTSS", LTYPE3, x86.ASQRTSS},
|
||||
{"STMXCSR", LTYPE1, x86.ASTMXCSR},
|
||||
{"SUBPD", LTYPE3, x86.ASUBPD},
|
||||
{"SUBPS", LTYPE3, x86.ASUBPS},
|
||||
{"SUBSD", LTYPE3, x86.ASUBSD},
|
||||
{"SUBSS", LTYPE3, x86.ASUBSS},
|
||||
{"UCOMISD", LTYPE3, x86.AUCOMISD},
|
||||
{"UCOMISS", LTYPE3, x86.AUCOMISS},
|
||||
{"UNPCKHPD", LTYPE3, x86.AUNPCKHPD},
|
||||
{"UNPCKHPS", LTYPE3, x86.AUNPCKHPS},
|
||||
{"UNPCKLPD", LTYPE3, x86.AUNPCKLPD},
|
||||
{"UNPCKLPS", LTYPE3, x86.AUNPCKLPS},
|
||||
{"XORPD", LTYPE3, x86.AXORPD},
|
||||
{"XORPS", LTYPE3, x86.AXORPS},
|
||||
{"CRC32B", LTYPE4, x86.ACRC32B},
|
||||
{"CRC32Q", LTYPE4, x86.ACRC32Q},
|
||||
{"PREFETCHT0", LTYPE2, x86.APREFETCHT0},
|
||||
{"PREFETCHT1", LTYPE2, x86.APREFETCHT1},
|
||||
{"PREFETCHT2", LTYPE2, x86.APREFETCHT2},
|
||||
{"PREFETCHNTA", LTYPE2, x86.APREFETCHNTA},
|
||||
{"UNDEF", LTYPE0, obj.AUNDEF},
|
||||
{"AESENC", LTYPE3, x86.AAESENC},
|
||||
{"AESENCLAST", LTYPE3, x86.AAESENCLAST},
|
||||
{"AESDEC", LTYPE3, x86.AAESDEC},
|
||||
{"AESDECLAST", LTYPE3, x86.AAESDECLAST},
|
||||
{"AESIMC", LTYPE3, x86.AAESIMC},
|
||||
{"AESKEYGENASSIST", LTYPEX, x86.AAESKEYGENASSIST},
|
||||
{"PSHUFD", LTYPEX, x86.APSHUFD},
|
||||
{"USEFIELD", LTYPEN, obj.AUSEFIELD},
|
||||
{"PCLMULQDQ", LTYPEX, x86.APCLMULQDQ},
|
||||
{"PCDATA", LTYPEPC, obj.APCDATA},
|
||||
{"FUNCDATA", LTYPEF, obj.AFUNCDATA},
|
||||
}
|
||||
|
||||
func cinit() {
|
||||
}
|
||||
|
||||
func checkscale(scale int16) {
|
||||
switch scale {
|
||||
case 1,
|
||||
2,
|
||||
4,
|
||||
8:
|
||||
return
|
||||
}
|
||||
|
||||
yyerror("scale must be 1248: %d", scale)
|
||||
}
|
||||
|
||||
func cclean() {
|
||||
var g2 Addr2
|
||||
|
||||
g2.from = nullgen
|
||||
g2.to = nullgen
|
||||
outcode(obj.AEND, &g2)
|
||||
}
|
||||
|
||||
var lastpc *obj.Prog
|
||||
|
||||
type Addr2 struct {
|
||||
from obj.Addr
|
||||
from3 obj.Addr
|
||||
to obj.Addr
|
||||
}
|
||||
|
||||
func outcode(a int, g2 *Addr2) {
|
||||
var p *obj.Prog
|
||||
var pl *obj.Plist
|
||||
|
||||
if asm.Pass == 1 {
|
||||
goto out
|
||||
}
|
||||
|
||||
p = new(obj.Prog)
|
||||
*p = obj.Prog{}
|
||||
p.Ctxt = asm.Ctxt
|
||||
p.As = int16(a)
|
||||
p.Lineno = stmtline
|
||||
p.From = g2.from
|
||||
if g2.from3.Type != 0 {
|
||||
p.From3 = new(obj.Addr)
|
||||
*p.From3 = g2.from3
|
||||
}
|
||||
p.To = g2.to
|
||||
p.Pc = int64(asm.PC)
|
||||
|
||||
if lastpc == nil {
|
||||
pl = obj.Linknewplist(asm.Ctxt)
|
||||
pl.Firstpc = p
|
||||
} else {
|
||||
|
||||
lastpc.Link = p
|
||||
}
|
||||
lastpc = p
|
||||
|
||||
out:
|
||||
if a != obj.AGLOBL && a != obj.ADATA {
|
||||
asm.PC++
|
||||
}
|
||||
}
|
||||
1530
src/cmd/old6a/y.go
1530
src/cmd/old6a/y.go
File diff suppressed because it is too large
Load Diff
|
|
@ -1,722 +0,0 @@
|
|||
// Inferno utils/8a/a.y
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/8a/a.y
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
%{
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
. "cmd/internal/obj/x86"
|
||||
)
|
||||
%}
|
||||
|
||||
%union {
|
||||
sym *asm.Sym
|
||||
lval int64
|
||||
con2 struct {
|
||||
v1 int32
|
||||
v2 int32
|
||||
}
|
||||
dval float64
|
||||
sval string
|
||||
addr obj.Addr
|
||||
addr2 Addr2
|
||||
}
|
||||
|
||||
%left '|'
|
||||
%left '^'
|
||||
%left '&'
|
||||
%left '<' '>'
|
||||
%left '+' '-'
|
||||
%left '*' '/' '%'
|
||||
%token <lval> LTYPE0 LTYPE1 LTYPE2 LTYPE3 LTYPE4
|
||||
%token <lval> LTYPEC LTYPED LTYPEN LTYPER LTYPET LTYPES LTYPEM LTYPEI LTYPEG LTYPEXC
|
||||
%token <lval> LTYPEX LTYPEPC LTYPEF LCONST LFP LPC LSB
|
||||
%token <lval> LBREG LLREG LSREG LFREG LXREG
|
||||
%token <dval> LFCONST
|
||||
%token <sval> LSCONST LSP
|
||||
%token <sym> LNAME LLAB LVAR
|
||||
%type <lval> con expr pointer offset
|
||||
%type <addr> mem imm reg nam rel rem rim rom omem nmem textsize
|
||||
%type <addr2> nonnon nonrel nonrem rimnon rimrem remrim
|
||||
%type <addr2> spec3 spec4 spec5 spec6 spec7 spec9 spec10 spec11 spec12
|
||||
%%
|
||||
prog:
|
||||
| prog
|
||||
{
|
||||
stmtline = asm.Lineno;
|
||||
}
|
||||
line
|
||||
|
||||
line:
|
||||
LNAME ':'
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
if $1.Type == LLAB && $1.Value != int64(asm.PC) {
|
||||
yyerror("redeclaration of %s", $1.Labelname)
|
||||
}
|
||||
$1.Type = LLAB;
|
||||
$1.Value = int64(asm.PC)
|
||||
}
|
||||
line
|
||||
| ';'
|
||||
| inst ';'
|
||||
| error ';'
|
||||
|
||||
inst:
|
||||
LNAME '=' expr
|
||||
{
|
||||
$1.Type = LVAR;
|
||||
$1.Value = $3;
|
||||
}
|
||||
| LVAR '=' expr
|
||||
{
|
||||
if $1.Value != int64($3) {
|
||||
yyerror("redeclaration of %s", $1.Name);
|
||||
}
|
||||
$1.Value = $3;
|
||||
}
|
||||
| LTYPE0 nonnon { outcode(int($1), &$2); }
|
||||
| LTYPE1 nonrem { outcode(int($1), &$2); }
|
||||
| LTYPE2 rimnon { outcode(int($1), &$2); }
|
||||
| LTYPE3 rimrem { outcode(int($1), &$2); }
|
||||
| LTYPE4 remrim { outcode(int($1), &$2); }
|
||||
| LTYPER nonrel { outcode(int($1), &$2); }
|
||||
| spec1
|
||||
| spec2
|
||||
| LTYPEC spec3 { outcode(int($1), &$2); }
|
||||
| LTYPEN spec4 { outcode(int($1), &$2); }
|
||||
| LTYPES spec5 { outcode(int($1), &$2); }
|
||||
| LTYPEM spec6 { outcode(int($1), &$2); }
|
||||
| LTYPEI spec7 { outcode(int($1), &$2); }
|
||||
| spec8
|
||||
| LTYPEXC spec9 { outcode(int($1), &$2); }
|
||||
| LTYPEX spec10 { outcode(int($1), &$2); }
|
||||
| LTYPEPC spec11 { outcode(int($1), &$2); }
|
||||
| LTYPEF spec12 { outcode(int($1), &$2); }
|
||||
|
||||
nonnon:
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| ','
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
|
||||
rimrem:
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
remrim:
|
||||
rem ',' rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
rimnon:
|
||||
rim ','
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
|
||||
nonrem:
|
||||
',' rem
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rem
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
|
||||
nonrel:
|
||||
',' rel
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rel
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
| imm ',' rel
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec1: /* DATA */
|
||||
LTYPED nam '/' con ',' imm
|
||||
{
|
||||
outcode(obj.ADATA, &Addr2{$2, $6})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
spec2: /* TEXT */
|
||||
LTYPET mem ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.ATEXT, &Addr2{$2, $5})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LTYPET mem ',' con ',' '$' textsize
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.ATEXT, &Addr2{$2, $7})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
spec8: /* GLOBL */
|
||||
LTYPEG mem ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.AGLOBL, &Addr2{$2, $4})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
}
|
||||
}
|
||||
| LTYPEG mem ',' con ',' imm
|
||||
{
|
||||
asm.Settext($2.Sym);
|
||||
outcode(obj.AGLOBL, &Addr2{$2, $6})
|
||||
if asm.Pass > 1 {
|
||||
lastpc.From3 = new(obj.Addr)
|
||||
lastpc.From3.Type = obj.TYPE_CONST
|
||||
lastpc.From3.Offset = $4
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
spec3: /* JMP/CALL */
|
||||
',' rom
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
}
|
||||
| rom
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $1;
|
||||
}
|
||||
| '*' nam
|
||||
{
|
||||
$$.from = nullgen;
|
||||
$$.to = $2;
|
||||
$$.to.Type = obj.TYPE_INDIR
|
||||
}
|
||||
|
||||
spec4: /* NOP */
|
||||
nonnon
|
||||
| nonrem
|
||||
|
||||
spec5: /* SHL/SHR */
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
| rim ',' rem ':' LLREG
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
if $$.from.Index != obj.TYPE_NONE {
|
||||
yyerror("dp shift with lhs index");
|
||||
}
|
||||
$$.from.Index = int16($5);
|
||||
}
|
||||
|
||||
spec6: /* MOVW/MOVL */
|
||||
rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
| rim ',' rem ':' LSREG
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
if $$.to.Index != obj.TYPE_NONE {
|
||||
yyerror("dp move with lhs index");
|
||||
}
|
||||
$$.to.Index = int16($5);
|
||||
}
|
||||
|
||||
spec7:
|
||||
rim ','
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = nullgen;
|
||||
}
|
||||
| rim ',' rem
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec9: /* CMPPS/CMPPD */
|
||||
rem ',' reg ',' con
|
||||
{
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
$$.to.Offset = $5;
|
||||
}
|
||||
|
||||
spec10: /* PINSRD */
|
||||
imm ',' rem ',' reg
|
||||
{
|
||||
$$.from = $3;
|
||||
$$.to = $5;
|
||||
if $1.Type != obj.TYPE_CONST {
|
||||
yyerror("illegal constant")
|
||||
}
|
||||
$$.to.Offset = $1.Offset;
|
||||
}
|
||||
|
||||
spec11: /* PCDATA */
|
||||
rim ',' rim
|
||||
{
|
||||
if $1.Type != obj.TYPE_CONST || $3.Type != obj.TYPE_CONST {
|
||||
yyerror("arguments to PCDATA must be integer constants");
|
||||
}
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
spec12: /* FUNCDATA */
|
||||
rim ',' rim
|
||||
{
|
||||
if $1.Type != obj.TYPE_CONST {
|
||||
yyerror("index for FUNCDATA must be integer constant");
|
||||
}
|
||||
if $3.Type != obj.TYPE_MEM || ($3.Name != obj.NAME_EXTERN && $3.Name != obj.NAME_STATIC) {
|
||||
yyerror("value for FUNCDATA must be symbol reference");
|
||||
}
|
||||
$$.from = $1;
|
||||
$$.to = $3;
|
||||
}
|
||||
|
||||
rem:
|
||||
reg
|
||||
| mem
|
||||
|
||||
rom:
|
||||
rel
|
||||
| nmem
|
||||
| '*' reg
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '*' omem
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| reg
|
||||
| omem
|
||||
| imm
|
||||
|
||||
rim:
|
||||
rem
|
||||
| imm
|
||||
|
||||
rel:
|
||||
con '(' LPC ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = $1 + int64(asm.PC);
|
||||
}
|
||||
| LNAME offset
|
||||
{
|
||||
$1 = asm.LabelLookup($1);
|
||||
$$ = nullgen;
|
||||
if asm.Pass == 2 && $1.Type != LLAB {
|
||||
yyerror("undefined label: %s", $1.Labelname);
|
||||
}
|
||||
$$.Type = obj.TYPE_BRANCH;
|
||||
$$.Offset = $1.Value + $2;
|
||||
}
|
||||
|
||||
reg:
|
||||
LBREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LFREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LLREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LXREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
| LSP
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = REG_SP;
|
||||
}
|
||||
| LSREG
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_REG
|
||||
$$.Reg = int16($1);
|
||||
}
|
||||
|
||||
imm:
|
||||
'$' con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_CONST;
|
||||
$$.Offset = $2;
|
||||
}
|
||||
| '$' nam
|
||||
{
|
||||
$$ = $2;
|
||||
$$.Type = obj.TYPE_ADDR
|
||||
/*
|
||||
if($2.Type == D_AUTO || $2.Type == D_PARAM)
|
||||
yyerror("constant cannot be automatic: %s",
|
||||
$2.Sym.name);
|
||||
*/
|
||||
}
|
||||
| '$' LSCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_SCONST;
|
||||
$$.Val = $2
|
||||
}
|
||||
| '$' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = $2;
|
||||
}
|
||||
| '$' '(' LFCONST ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = $3;
|
||||
}
|
||||
| '$' '(' '-' LFCONST ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = -$4;
|
||||
}
|
||||
| '$' '-' LFCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_FCONST;
|
||||
$$.Val = -$3;
|
||||
}
|
||||
|
||||
textsize:
|
||||
LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = $1;
|
||||
$$.Val = int32(obj.ArgsSizeUnknown);
|
||||
}
|
||||
| '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -$2;
|
||||
$$.Val = int32(obj.ArgsSizeUnknown);
|
||||
}
|
||||
| LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = $1;
|
||||
$$.Val = int32($3);
|
||||
}
|
||||
| '-' LCONST '-' LCONST
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_TEXTSIZE;
|
||||
$$.Offset = -$2;
|
||||
$$.Val = int32($4);
|
||||
}
|
||||
|
||||
|
||||
mem:
|
||||
omem
|
||||
| nmem
|
||||
|
||||
omem:
|
||||
con
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LLREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LSP ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = REG_SP
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| con '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($3);
|
||||
$$.Scale = int16($5);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| con '(' LLREG ')' '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($6);
|
||||
$$.Scale = int16($8);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| con '(' LLREG ')' '(' LSREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
$$.Index = int16($6);
|
||||
$$.Scale = int16($8);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| '(' LLREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($2);
|
||||
}
|
||||
| '(' LSP ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = REG_SP
|
||||
}
|
||||
| con '(' LSREG ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($3)
|
||||
$$.Offset = $1;
|
||||
}
|
||||
| '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Index = int16($2);
|
||||
$$.Scale = int16($4);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
| '(' LLREG ')' '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Reg = int16($2)
|
||||
$$.Index = int16($5);
|
||||
$$.Scale = int16($7);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
|
||||
nmem:
|
||||
nam
|
||||
{
|
||||
$$ = $1;
|
||||
}
|
||||
| nam '(' LLREG '*' con ')'
|
||||
{
|
||||
$$ = $1;
|
||||
$$.Index = int16($3);
|
||||
$$.Scale = int16($5);
|
||||
checkscale($$.Scale);
|
||||
}
|
||||
|
||||
nam:
|
||||
LNAME offset '(' pointer ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Name = int8($4);
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 0);
|
||||
$$.Offset = $2;
|
||||
}
|
||||
| LNAME '<' '>' offset '(' LSB ')'
|
||||
{
|
||||
$$ = nullgen;
|
||||
$$.Type = obj.TYPE_MEM
|
||||
$$.Name = obj.NAME_STATIC
|
||||
$$.Sym = obj.Linklookup(asm.Ctxt, $1.Name, 1);
|
||||
$$.Offset = $4;
|
||||
}
|
||||
|
||||
offset:
|
||||
{
|
||||
$$ = 0;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
|
||||
pointer:
|
||||
LSB
|
||||
| LSP
|
||||
{
|
||||
$$ = obj.NAME_AUTO;
|
||||
}
|
||||
| LFP
|
||||
|
||||
con:
|
||||
LCONST
|
||||
| LVAR
|
||||
{
|
||||
$$ = $1.Value;
|
||||
}
|
||||
| '-' con
|
||||
{
|
||||
$$ = -$2;
|
||||
}
|
||||
| '+' con
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
| '~' con
|
||||
{
|
||||
$$ = ^$2;
|
||||
}
|
||||
| '(' expr ')'
|
||||
{
|
||||
$$ = $2;
|
||||
}
|
||||
|
||||
expr:
|
||||
con
|
||||
| expr '+' expr
|
||||
{
|
||||
$$ = $1 + $3;
|
||||
}
|
||||
| expr '-' expr
|
||||
{
|
||||
$$ = $1 - $3;
|
||||
}
|
||||
| expr '*' expr
|
||||
{
|
||||
$$ = $1 * $3;
|
||||
}
|
||||
| expr '/' expr
|
||||
{
|
||||
$$ = $1 / $3;
|
||||
}
|
||||
| expr '%' expr
|
||||
{
|
||||
$$ = $1 % $3;
|
||||
}
|
||||
| expr '<' '<' expr
|
||||
{
|
||||
$$ = $1 << uint($4);
|
||||
}
|
||||
| expr '>' '>' expr
|
||||
{
|
||||
$$ = $1 >> uint($4);
|
||||
}
|
||||
| expr '&' expr
|
||||
{
|
||||
$$ = $1 & $3;
|
||||
}
|
||||
| expr '^' expr
|
||||
{
|
||||
$$ = $1 ^ $3;
|
||||
}
|
||||
| expr '|' expr
|
||||
{
|
||||
$$ = $1 | $3;
|
||||
}
|
||||
|
|
@ -1,771 +0,0 @@
|
|||
// Inferno utils/8a/lex.c
|
||||
// http://code.google.com/p/inferno-os/source/browse/utils/8a/lex.c
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
//go:generate go tool yacc a.y
|
||||
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/obj/x86"
|
||||
)
|
||||
|
||||
var (
|
||||
yyerror = asm.Yyerror
|
||||
nullgen obj.Addr
|
||||
stmtline int32
|
||||
)
|
||||
|
||||
func main() {
|
||||
cinit()
|
||||
|
||||
asm.LSCONST = LSCONST
|
||||
asm.LCONST = LCONST
|
||||
asm.LFCONST = LFCONST
|
||||
asm.LNAME = LNAME
|
||||
asm.LVAR = LVAR
|
||||
asm.LLAB = LLAB
|
||||
|
||||
asm.Lexinit = lexinit
|
||||
asm.Cclean = cclean
|
||||
asm.Yyparse = yyparse
|
||||
|
||||
asm.Thechar = '8'
|
||||
asm.Thestring = "386"
|
||||
asm.Thelinkarch = &x86.Link386
|
||||
|
||||
asm.Main()
|
||||
}
|
||||
|
||||
type yy struct{}
|
||||
|
||||
func (yy) Lex(v *yySymType) int {
|
||||
var av asm.Yylval
|
||||
tok := asm.Yylex(&av)
|
||||
v.sym = av.Sym
|
||||
v.lval = av.Lval
|
||||
v.sval = av.Sval
|
||||
v.dval = av.Dval
|
||||
return tok
|
||||
}
|
||||
|
||||
func (yy) Error(msg string) {
|
||||
asm.Yyerror("%s", msg)
|
||||
}
|
||||
|
||||
func yyparse() {
|
||||
yyParse(yy{})
|
||||
}
|
||||
|
||||
var lexinit = []asm.Lextab{
|
||||
{"SP", LSP, obj.NAME_AUTO},
|
||||
{"SB", LSB, obj.NAME_EXTERN},
|
||||
{"FP", LFP, obj.NAME_PARAM},
|
||||
{"PC", LPC, obj.TYPE_BRANCH},
|
||||
{"AL", LBREG, x86.REG_AL},
|
||||
{"CL", LBREG, x86.REG_CL},
|
||||
{"DL", LBREG, x86.REG_DL},
|
||||
{"BL", LBREG, x86.REG_BL},
|
||||
{"AH", LBREG, x86.REG_AH},
|
||||
{"CH", LBREG, x86.REG_CH},
|
||||
{"DH", LBREG, x86.REG_DH},
|
||||
{"BH", LBREG, x86.REG_BH},
|
||||
{"AX", LLREG, x86.REG_AX},
|
||||
{"CX", LLREG, x86.REG_CX},
|
||||
{"DX", LLREG, x86.REG_DX},
|
||||
{"BX", LLREG, x86.REG_BX},
|
||||
/* "SP", LLREG, REG_SP, */
|
||||
{"BP", LLREG, x86.REG_BP},
|
||||
{"SI", LLREG, x86.REG_SI},
|
||||
{"DI", LLREG, x86.REG_DI},
|
||||
{"F0", LFREG, x86.REG_F0 + 0},
|
||||
{"F1", LFREG, x86.REG_F0 + 1},
|
||||
{"F2", LFREG, x86.REG_F0 + 2},
|
||||
{"F3", LFREG, x86.REG_F0 + 3},
|
||||
{"F4", LFREG, x86.REG_F0 + 4},
|
||||
{"F5", LFREG, x86.REG_F0 + 5},
|
||||
{"F6", LFREG, x86.REG_F0 + 6},
|
||||
{"F7", LFREG, x86.REG_F0 + 7},
|
||||
{"X0", LXREG, x86.REG_X0 + 0},
|
||||
{"X1", LXREG, x86.REG_X0 + 1},
|
||||
{"X2", LXREG, x86.REG_X0 + 2},
|
||||
{"X3", LXREG, x86.REG_X0 + 3},
|
||||
{"X4", LXREG, x86.REG_X0 + 4},
|
||||
{"X5", LXREG, x86.REG_X0 + 5},
|
||||
{"X6", LXREG, x86.REG_X0 + 6},
|
||||
{"X7", LXREG, x86.REG_X0 + 7},
|
||||
{"CS", LSREG, x86.REG_CS},
|
||||
{"SS", LSREG, x86.REG_SS},
|
||||
{"DS", LSREG, x86.REG_DS},
|
||||
{"ES", LSREG, x86.REG_ES},
|
||||
{"FS", LSREG, x86.REG_FS},
|
||||
{"GS", LSREG, x86.REG_GS},
|
||||
{"TLS", LSREG, x86.REG_TLS},
|
||||
{"GDTR", LBREG, x86.REG_GDTR},
|
||||
{"IDTR", LBREG, x86.REG_IDTR},
|
||||
{"LDTR", LBREG, x86.REG_LDTR},
|
||||
{"MSW", LBREG, x86.REG_MSW},
|
||||
{"TASK", LBREG, x86.REG_TASK},
|
||||
{"CR0", LBREG, x86.REG_CR + 0},
|
||||
{"CR1", LBREG, x86.REG_CR + 1},
|
||||
{"CR2", LBREG, x86.REG_CR + 2},
|
||||
{"CR3", LBREG, x86.REG_CR + 3},
|
||||
{"CR4", LBREG, x86.REG_CR + 4},
|
||||
{"CR5", LBREG, x86.REG_CR + 5},
|
||||
{"CR6", LBREG, x86.REG_CR + 6},
|
||||
{"CR7", LBREG, x86.REG_CR + 7},
|
||||
{"DR0", LBREG, x86.REG_DR + 0},
|
||||
{"DR1", LBREG, x86.REG_DR + 1},
|
||||
{"DR2", LBREG, x86.REG_DR + 2},
|
||||
{"DR3", LBREG, x86.REG_DR + 3},
|
||||
{"DR4", LBREG, x86.REG_DR + 4},
|
||||
{"DR5", LBREG, x86.REG_DR + 5},
|
||||
{"DR6", LBREG, x86.REG_DR + 6},
|
||||
{"DR7", LBREG, x86.REG_DR + 7},
|
||||
{"TR0", LBREG, x86.REG_TR + 0},
|
||||
{"TR1", LBREG, x86.REG_TR + 1},
|
||||
{"TR2", LBREG, x86.REG_TR + 2},
|
||||
{"TR3", LBREG, x86.REG_TR + 3},
|
||||
{"TR4", LBREG, x86.REG_TR + 4},
|
||||
{"TR5", LBREG, x86.REG_TR + 5},
|
||||
{"TR6", LBREG, x86.REG_TR + 6},
|
||||
{"TR7", LBREG, x86.REG_TR + 7},
|
||||
{"AAA", LTYPE0, x86.AAAA},
|
||||
{"AAD", LTYPE0, x86.AAAD},
|
||||
{"AAM", LTYPE0, x86.AAAM},
|
||||
{"AAS", LTYPE0, x86.AAAS},
|
||||
{"ADCB", LTYPE3, x86.AADCB},
|
||||
{"ADCL", LTYPE3, x86.AADCL},
|
||||
{"ADCW", LTYPE3, x86.AADCW},
|
||||
{"ADDB", LTYPE3, x86.AADDB},
|
||||
{"ADDL", LTYPE3, x86.AADDL},
|
||||
{"ADDW", LTYPE3, x86.AADDW},
|
||||
{"ADJSP", LTYPE2, x86.AADJSP},
|
||||
{"ANDB", LTYPE3, x86.AANDB},
|
||||
{"ANDL", LTYPE3, x86.AANDL},
|
||||
{"ANDW", LTYPE3, x86.AANDW},
|
||||
{"ARPL", LTYPE3, x86.AARPL},
|
||||
{"BOUNDL", LTYPE3, x86.ABOUNDL},
|
||||
{"BOUNDW", LTYPE3, x86.ABOUNDW},
|
||||
{"BSFL", LTYPE3, x86.ABSFL},
|
||||
{"BSFW", LTYPE3, x86.ABSFW},
|
||||
{"BSRL", LTYPE3, x86.ABSRL},
|
||||
{"BSRW", LTYPE3, x86.ABSRW},
|
||||
{"BSWAPL", LTYPE1, x86.ABSWAPL},
|
||||
{"BTCL", LTYPE3, x86.ABTCL},
|
||||
{"BTCW", LTYPE3, x86.ABTCW},
|
||||
{"BTL", LTYPE3, x86.ABTL},
|
||||
{"BTRL", LTYPE3, x86.ABTRL},
|
||||
{"BTRW", LTYPE3, x86.ABTRW},
|
||||
{"BTSL", LTYPE3, x86.ABTSL},
|
||||
{"BTSW", LTYPE3, x86.ABTSW},
|
||||
{"BTW", LTYPE3, x86.ABTW},
|
||||
{"BYTE", LTYPE2, x86.ABYTE},
|
||||
{"CALL", LTYPEC, obj.ACALL},
|
||||
{"CLC", LTYPE0, x86.ACLC},
|
||||
{"CLD", LTYPE0, x86.ACLD},
|
||||
{"CLI", LTYPE0, x86.ACLI},
|
||||
{"CLTS", LTYPE0, x86.ACLTS},
|
||||
{"CMC", LTYPE0, x86.ACMC},
|
||||
{"CMPB", LTYPE4, x86.ACMPB},
|
||||
{"CMPL", LTYPE4, x86.ACMPL},
|
||||
{"CMPW", LTYPE4, x86.ACMPW},
|
||||
{"CMPSB", LTYPE0, x86.ACMPSB},
|
||||
{"CMPSL", LTYPE0, x86.ACMPSL},
|
||||
{"CMPSW", LTYPE0, x86.ACMPSW},
|
||||
{"CMPXCHG8B", LTYPE1, x86.ACMPXCHG8B},
|
||||
{"CMPXCHGB", LTYPE3, x86.ACMPXCHGB},
|
||||
{"CMPXCHGL", LTYPE3, x86.ACMPXCHGL},
|
||||
{"CMPXCHGW", LTYPE3, x86.ACMPXCHGW},
|
||||
{"CPUID", LTYPE0, x86.ACPUID},
|
||||
{"DAA", LTYPE0, x86.ADAA},
|
||||
{"DAS", LTYPE0, x86.ADAS},
|
||||
{"DATA", LTYPED, obj.ADATA},
|
||||
{"DECB", LTYPE1, x86.ADECB},
|
||||
{"DECL", LTYPE1, x86.ADECL},
|
||||
{"DECW", LTYPE1, x86.ADECW},
|
||||
{"DIVB", LTYPE2, x86.ADIVB},
|
||||
{"DIVL", LTYPE2, x86.ADIVL},
|
||||
{"DIVW", LTYPE2, x86.ADIVW},
|
||||
{"END", LTYPE0, obj.AEND},
|
||||
{"ENTER", LTYPE2, x86.AENTER},
|
||||
{"GLOBL", LTYPEG, obj.AGLOBL},
|
||||
{"HLT", LTYPE0, x86.AHLT},
|
||||
{"IDIVB", LTYPE2, x86.AIDIVB},
|
||||
{"IDIVL", LTYPE2, x86.AIDIVL},
|
||||
{"IDIVW", LTYPE2, x86.AIDIVW},
|
||||
{"IMULB", LTYPE2, x86.AIMULB},
|
||||
{"IMULL", LTYPEI, x86.AIMULL},
|
||||
{"IMULW", LTYPEI, x86.AIMULW},
|
||||
{"INB", LTYPE0, x86.AINB},
|
||||
{"INL", LTYPE0, x86.AINL},
|
||||
{"INW", LTYPE0, x86.AINW},
|
||||
{"INCB", LTYPE1, x86.AINCB},
|
||||
{"INCL", LTYPE1, x86.AINCL},
|
||||
{"INCW", LTYPE1, x86.AINCW},
|
||||
{"INSB", LTYPE0, x86.AINSB},
|
||||
{"INSL", LTYPE0, x86.AINSL},
|
||||
{"INSW", LTYPE0, x86.AINSW},
|
||||
{"INT", LTYPE2, x86.AINT},
|
||||
{"INTO", LTYPE0, x86.AINTO},
|
||||
{"IRETL", LTYPE0, x86.AIRETL},
|
||||
{"IRETW", LTYPE0, x86.AIRETW},
|
||||
{"JOS", LTYPER, x86.AJOS}, /* overflow set (OF = 1) */
|
||||
{"JO", LTYPER, x86.AJOS}, /* alternate */
|
||||
{"JOC", LTYPER, x86.AJOC}, /* overflow clear (OF = 0) */
|
||||
{"JNO", LTYPER, x86.AJOC}, /* alternate */
|
||||
{"JCS", LTYPER, x86.AJCS}, /* carry set (CF = 1) */
|
||||
{"JB", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JC", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JNAE", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JLO", LTYPER, x86.AJCS}, /* alternate */
|
||||
{"JCC", LTYPER, x86.AJCC}, /* carry clear (CF = 0) */
|
||||
{"JAE", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JNB", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JNC", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JHS", LTYPER, x86.AJCC}, /* alternate */
|
||||
{"JEQ", LTYPER, x86.AJEQ}, /* equal (ZF = 1) */
|
||||
{"JE", LTYPER, x86.AJEQ}, /* alternate */
|
||||
{"JZ", LTYPER, x86.AJEQ}, /* alternate */
|
||||
{"JNE", LTYPER, x86.AJNE}, /* not equal (ZF = 0) */
|
||||
{"JNZ", LTYPER, x86.AJNE}, /* alternate */
|
||||
{"JLS", LTYPER, x86.AJLS}, /* lower or same (unsigned) (CF = 1 || ZF = 1) */
|
||||
{"JBE", LTYPER, x86.AJLS}, /* alternate */
|
||||
{"JNA", LTYPER, x86.AJLS}, /* alternate */
|
||||
{"JHI", LTYPER, x86.AJHI}, /* higher (unsigned) (CF = 0 && ZF = 0) */
|
||||
{"JA", LTYPER, x86.AJHI}, /* alternate */
|
||||
{"JNBE", LTYPER, x86.AJHI}, /* alternate */
|
||||
{"JMI", LTYPER, x86.AJMI}, /* negative (minus) (SF = 1) */
|
||||
{"JS", LTYPER, x86.AJMI}, /* alternate */
|
||||
{"JPL", LTYPER, x86.AJPL}, /* non-negative (plus) (SF = 0) */
|
||||
{"JNS", LTYPER, x86.AJPL}, /* alternate */
|
||||
{"JPS", LTYPER, x86.AJPS}, /* parity set (PF = 1) */
|
||||
{"JP", LTYPER, x86.AJPS}, /* alternate */
|
||||
{"JPE", LTYPER, x86.AJPS}, /* alternate */
|
||||
{"JPC", LTYPER, x86.AJPC}, /* parity clear (PF = 0) */
|
||||
{"JNP", LTYPER, x86.AJPC}, /* alternate */
|
||||
{"JPO", LTYPER, x86.AJPC}, /* alternate */
|
||||
{"JLT", LTYPER, x86.AJLT}, /* less than (signed) (SF != OF) */
|
||||
{"JL", LTYPER, x86.AJLT}, /* alternate */
|
||||
{"JNGE", LTYPER, x86.AJLT}, /* alternate */
|
||||
{"JGE", LTYPER, x86.AJGE}, /* greater than or equal (signed) (SF = OF) */
|
||||
{"JNL", LTYPER, x86.AJGE}, /* alternate */
|
||||
{"JLE", LTYPER, x86.AJLE}, /* less than or equal (signed) (ZF = 1 || SF != OF) */
|
||||
{"JNG", LTYPER, x86.AJLE}, /* alternate */
|
||||
{"JGT", LTYPER, x86.AJGT}, /* greater than (signed) (ZF = 0 && SF = OF) */
|
||||
{"JG", LTYPER, x86.AJGT}, /* alternate */
|
||||
{"JNLE", LTYPER, x86.AJGT}, /* alternate */
|
||||
{"JCXZL", LTYPER, x86.AJCXZL},
|
||||
{"JCXZW", LTYPER, x86.AJCXZW},
|
||||
{"JMP", LTYPEC, obj.AJMP},
|
||||
{"LAHF", LTYPE0, x86.ALAHF},
|
||||
{"LARL", LTYPE3, x86.ALARL},
|
||||
{"LARW", LTYPE3, x86.ALARW},
|
||||
{"LEAL", LTYPE3, x86.ALEAL},
|
||||
{"LEAW", LTYPE3, x86.ALEAW},
|
||||
{"LEAVEL", LTYPE0, x86.ALEAVEL},
|
||||
{"LEAVEW", LTYPE0, x86.ALEAVEW},
|
||||
{"LOCK", LTYPE0, x86.ALOCK},
|
||||
{"LODSB", LTYPE0, x86.ALODSB},
|
||||
{"LODSL", LTYPE0, x86.ALODSL},
|
||||
{"LODSW", LTYPE0, x86.ALODSW},
|
||||
{"LONG", LTYPE2, x86.ALONG},
|
||||
{"LOOP", LTYPER, x86.ALOOP},
|
||||
{"LOOPEQ", LTYPER, x86.ALOOPEQ},
|
||||
{"LOOPNE", LTYPER, x86.ALOOPNE},
|
||||
{"LSLL", LTYPE3, x86.ALSLL},
|
||||
{"LSLW", LTYPE3, x86.ALSLW},
|
||||
{"MOVB", LTYPE3, x86.AMOVB},
|
||||
{"MOVL", LTYPEM, x86.AMOVL},
|
||||
{"MOVW", LTYPEM, x86.AMOVW},
|
||||
{"MOVQ", LTYPEM, x86.AMOVQ},
|
||||
{"MOVBLSX", LTYPE3, x86.AMOVBLSX},
|
||||
{"MOVBLZX", LTYPE3, x86.AMOVBLZX},
|
||||
{"MOVBWSX", LTYPE3, x86.AMOVBWSX},
|
||||
{"MOVBWZX", LTYPE3, x86.AMOVBWZX},
|
||||
{"MOVWLSX", LTYPE3, x86.AMOVWLSX},
|
||||
{"MOVWLZX", LTYPE3, x86.AMOVWLZX},
|
||||
{"MOVSB", LTYPE0, x86.AMOVSB},
|
||||
{"MOVSL", LTYPE0, x86.AMOVSL},
|
||||
{"MOVSW", LTYPE0, x86.AMOVSW},
|
||||
{"MULB", LTYPE2, x86.AMULB},
|
||||
{"MULL", LTYPE2, x86.AMULL},
|
||||
{"MULW", LTYPE2, x86.AMULW},
|
||||
{"NEGB", LTYPE1, x86.ANEGB},
|
||||
{"NEGL", LTYPE1, x86.ANEGL},
|
||||
{"NEGW", LTYPE1, x86.ANEGW},
|
||||
{"NOP", LTYPEN, obj.ANOP},
|
||||
{"NOTB", LTYPE1, x86.ANOTB},
|
||||
{"NOTL", LTYPE1, x86.ANOTL},
|
||||
{"NOTW", LTYPE1, x86.ANOTW},
|
||||
{"ORB", LTYPE3, x86.AORB},
|
||||
{"ORL", LTYPE3, x86.AORL},
|
||||
{"ORW", LTYPE3, x86.AORW},
|
||||
{"OUTB", LTYPE0, x86.AOUTB},
|
||||
{"OUTL", LTYPE0, x86.AOUTL},
|
||||
{"OUTW", LTYPE0, x86.AOUTW},
|
||||
{"OUTSB", LTYPE0, x86.AOUTSB},
|
||||
{"OUTSL", LTYPE0, x86.AOUTSL},
|
||||
{"OUTSW", LTYPE0, x86.AOUTSW},
|
||||
{"PAUSE", LTYPEN, x86.APAUSE},
|
||||
{"PINSRD", LTYPEX, x86.APINSRD},
|
||||
{"POPAL", LTYPE0, x86.APOPAL},
|
||||
{"POPAW", LTYPE0, x86.APOPAW},
|
||||
{"POPFL", LTYPE0, x86.APOPFL},
|
||||
{"POPFW", LTYPE0, x86.APOPFW},
|
||||
{"POPL", LTYPE1, x86.APOPL},
|
||||
{"POPW", LTYPE1, x86.APOPW},
|
||||
{"PUSHAL", LTYPE0, x86.APUSHAL},
|
||||
{"PUSHAW", LTYPE0, x86.APUSHAW},
|
||||
{"PUSHFL", LTYPE0, x86.APUSHFL},
|
||||
{"PUSHFW", LTYPE0, x86.APUSHFW},
|
||||
{"PUSHL", LTYPE2, x86.APUSHL},
|
||||
{"PUSHW", LTYPE2, x86.APUSHW},
|
||||
{"RCLB", LTYPE3, x86.ARCLB},
|
||||
{"RCLL", LTYPE3, x86.ARCLL},
|
||||
{"RCLW", LTYPE3, x86.ARCLW},
|
||||
{"RCRB", LTYPE3, x86.ARCRB},
|
||||
{"RCRL", LTYPE3, x86.ARCRL},
|
||||
{"RCRW", LTYPE3, x86.ARCRW},
|
||||
{"RDTSC", LTYPE0, x86.ARDTSC},
|
||||
{"REP", LTYPE0, x86.AREP},
|
||||
{"REPN", LTYPE0, x86.AREPN},
|
||||
{"RET", LTYPE0, obj.ARET},
|
||||
{"ROLB", LTYPE3, x86.AROLB},
|
||||
{"ROLL", LTYPE3, x86.AROLL},
|
||||
{"ROLW", LTYPE3, x86.AROLW},
|
||||
{"RORB", LTYPE3, x86.ARORB},
|
||||
{"RORL", LTYPE3, x86.ARORL},
|
||||
{"RORW", LTYPE3, x86.ARORW},
|
||||
{"SAHF", LTYPE0, x86.ASAHF},
|
||||
{"SALB", LTYPE3, x86.ASALB},
|
||||
{"SALL", LTYPE3, x86.ASALL},
|
||||
{"SALW", LTYPE3, x86.ASALW},
|
||||
{"SARB", LTYPE3, x86.ASARB},
|
||||
{"SARL", LTYPE3, x86.ASARL},
|
||||
{"SARW", LTYPE3, x86.ASARW},
|
||||
{"SBBB", LTYPE3, x86.ASBBB},
|
||||
{"SBBL", LTYPE3, x86.ASBBL},
|
||||
{"SBBW", LTYPE3, x86.ASBBW},
|
||||
{"SCASB", LTYPE0, x86.ASCASB},
|
||||
{"SCASL", LTYPE0, x86.ASCASL},
|
||||
{"SCASW", LTYPE0, x86.ASCASW},
|
||||
{"SETCC", LTYPE1, x86.ASETCC}, /* see JCC etc above for condition codes */
|
||||
{"SETCS", LTYPE1, x86.ASETCS},
|
||||
{"SETEQ", LTYPE1, x86.ASETEQ},
|
||||
{"SETGE", LTYPE1, x86.ASETGE},
|
||||
{"SETGT", LTYPE1, x86.ASETGT},
|
||||
{"SETHI", LTYPE1, x86.ASETHI},
|
||||
{"SETLE", LTYPE1, x86.ASETLE},
|
||||
{"SETLS", LTYPE1, x86.ASETLS},
|
||||
{"SETLT", LTYPE1, x86.ASETLT},
|
||||
{"SETMI", LTYPE1, x86.ASETMI},
|
||||
{"SETNE", LTYPE1, x86.ASETNE},
|
||||
{"SETOC", LTYPE1, x86.ASETOC},
|
||||
{"SETOS", LTYPE1, x86.ASETOS},
|
||||
{"SETPC", LTYPE1, x86.ASETPC},
|
||||
{"SETPL", LTYPE1, x86.ASETPL},
|
||||
{"SETPS", LTYPE1, x86.ASETPS},
|
||||
{"CDQ", LTYPE0, x86.ACDQ},
|
||||
{"CWD", LTYPE0, x86.ACWD},
|
||||
{"SHLB", LTYPE3, x86.ASHLB},
|
||||
{"SHLL", LTYPES, x86.ASHLL},
|
||||
{"SHLW", LTYPES, x86.ASHLW},
|
||||
{"SHRB", LTYPE3, x86.ASHRB},
|
||||
{"SHRL", LTYPES, x86.ASHRL},
|
||||
{"SHRW", LTYPES, x86.ASHRW},
|
||||
{"STC", LTYPE0, x86.ASTC},
|
||||
{"STD", LTYPE0, x86.ASTD},
|
||||
{"STI", LTYPE0, x86.ASTI},
|
||||
{"STOSB", LTYPE0, x86.ASTOSB},
|
||||
{"STOSL", LTYPE0, x86.ASTOSL},
|
||||
{"STOSW", LTYPE0, x86.ASTOSW},
|
||||
{"SUBB", LTYPE3, x86.ASUBB},
|
||||
{"SUBL", LTYPE3, x86.ASUBL},
|
||||
{"SUBW", LTYPE3, x86.ASUBW},
|
||||
{"SYSCALL", LTYPE0, x86.ASYSCALL},
|
||||
{"TESTB", LTYPE3, x86.ATESTB},
|
||||
{"TESTL", LTYPE3, x86.ATESTL},
|
||||
{"TESTW", LTYPE3, x86.ATESTW},
|
||||
{"TEXT", LTYPET, obj.ATEXT},
|
||||
{"VERR", LTYPE2, x86.AVERR},
|
||||
{"VERW", LTYPE2, x86.AVERW},
|
||||
{"WAIT", LTYPE0, x86.AWAIT},
|
||||
{"WORD", LTYPE2, x86.AWORD},
|
||||
{"XADDB", LTYPE3, x86.AXADDB},
|
||||
{"XADDL", LTYPE3, x86.AXADDL},
|
||||
{"XADDW", LTYPE3, x86.AXADDW},
|
||||
{"XCHGB", LTYPE3, x86.AXCHGB},
|
||||
{"XCHGL", LTYPE3, x86.AXCHGL},
|
||||
{"XCHGW", LTYPE3, x86.AXCHGW},
|
||||
{"XLAT", LTYPE2, x86.AXLAT},
|
||||
{"XORB", LTYPE3, x86.AXORB},
|
||||
{"XORL", LTYPE3, x86.AXORL},
|
||||
{"XORW", LTYPE3, x86.AXORW},
|
||||
{"CMOVLCC", LTYPE3, x86.ACMOVLCC},
|
||||
{"CMOVLCS", LTYPE3, x86.ACMOVLCS},
|
||||
{"CMOVLEQ", LTYPE3, x86.ACMOVLEQ},
|
||||
{"CMOVLGE", LTYPE3, x86.ACMOVLGE},
|
||||
{"CMOVLGT", LTYPE3, x86.ACMOVLGT},
|
||||
{"CMOVLHI", LTYPE3, x86.ACMOVLHI},
|
||||
{"CMOVLLE", LTYPE3, x86.ACMOVLLE},
|
||||
{"CMOVLLS", LTYPE3, x86.ACMOVLLS},
|
||||
{"CMOVLLT", LTYPE3, x86.ACMOVLLT},
|
||||
{"CMOVLMI", LTYPE3, x86.ACMOVLMI},
|
||||
{"CMOVLNE", LTYPE3, x86.ACMOVLNE},
|
||||
{"CMOVLOC", LTYPE3, x86.ACMOVLOC},
|
||||
{"CMOVLOS", LTYPE3, x86.ACMOVLOS},
|
||||
{"CMOVLPC", LTYPE3, x86.ACMOVLPC},
|
||||
{"CMOVLPL", LTYPE3, x86.ACMOVLPL},
|
||||
{"CMOVLPS", LTYPE3, x86.ACMOVLPS},
|
||||
{"CMOVWCC", LTYPE3, x86.ACMOVWCC},
|
||||
{"CMOVWCS", LTYPE3, x86.ACMOVWCS},
|
||||
{"CMOVWEQ", LTYPE3, x86.ACMOVWEQ},
|
||||
{"CMOVWGE", LTYPE3, x86.ACMOVWGE},
|
||||
{"CMOVWGT", LTYPE3, x86.ACMOVWGT},
|
||||
{"CMOVWHI", LTYPE3, x86.ACMOVWHI},
|
||||
{"CMOVWLE", LTYPE3, x86.ACMOVWLE},
|
||||
{"CMOVWLS", LTYPE3, x86.ACMOVWLS},
|
||||
{"CMOVWLT", LTYPE3, x86.ACMOVWLT},
|
||||
{"CMOVWMI", LTYPE3, x86.ACMOVWMI},
|
||||
{"CMOVWNE", LTYPE3, x86.ACMOVWNE},
|
||||
{"CMOVWOC", LTYPE3, x86.ACMOVWOC},
|
||||
{"CMOVWOS", LTYPE3, x86.ACMOVWOS},
|
||||
{"CMOVWPC", LTYPE3, x86.ACMOVWPC},
|
||||
{"CMOVWPL", LTYPE3, x86.ACMOVWPL},
|
||||
{"CMOVWPS", LTYPE3, x86.ACMOVWPS},
|
||||
{"FMOVB", LTYPE3, x86.AFMOVB},
|
||||
{"FMOVBP", LTYPE3, x86.AFMOVBP},
|
||||
{"FMOVD", LTYPE3, x86.AFMOVD},
|
||||
{"FMOVDP", LTYPE3, x86.AFMOVDP},
|
||||
{"FMOVF", LTYPE3, x86.AFMOVF},
|
||||
{"FMOVFP", LTYPE3, x86.AFMOVFP},
|
||||
{"FMOVL", LTYPE3, x86.AFMOVL},
|
||||
{"FMOVLP", LTYPE3, x86.AFMOVLP},
|
||||
{"FMOVV", LTYPE3, x86.AFMOVV},
|
||||
{"FMOVVP", LTYPE3, x86.AFMOVVP},
|
||||
{"FMOVW", LTYPE3, x86.AFMOVW},
|
||||
{"FMOVWP", LTYPE3, x86.AFMOVWP},
|
||||
{"FMOVX", LTYPE3, x86.AFMOVX},
|
||||
{"FMOVXP", LTYPE3, x86.AFMOVXP},
|
||||
{"FCMOVCC", LTYPE3, x86.AFCMOVCC},
|
||||
{"FCMOVCS", LTYPE3, x86.AFCMOVCS},
|
||||
{"FCMOVEQ", LTYPE3, x86.AFCMOVEQ},
|
||||
{"FCMOVHI", LTYPE3, x86.AFCMOVHI},
|
||||
{"FCMOVLS", LTYPE3, x86.AFCMOVLS},
|
||||
{"FCMOVNE", LTYPE3, x86.AFCMOVNE},
|
||||
{"FCMOVNU", LTYPE3, x86.AFCMOVNU},
|
||||
{"FCMOVUN", LTYPE3, x86.AFCMOVUN},
|
||||
{"FCOMB", LTYPE3, x86.AFCOMB},
|
||||
{"FCOMBP", LTYPE3, x86.AFCOMBP},
|
||||
{"FCOMD", LTYPE3, x86.AFCOMD},
|
||||
{"FCOMDP", LTYPE3, x86.AFCOMDP},
|
||||
{"FCOMDPP", LTYPE3, x86.AFCOMDPP},
|
||||
{"FCOMF", LTYPE3, x86.AFCOMF},
|
||||
{"FCOMFP", LTYPE3, x86.AFCOMFP},
|
||||
{"FCOMI", LTYPE3, x86.AFCOMI},
|
||||
{"FCOMIP", LTYPE3, x86.AFCOMIP},
|
||||
{"FCOML", LTYPE3, x86.AFCOML},
|
||||
{"FCOMLP", LTYPE3, x86.AFCOMLP},
|
||||
{"FCOMW", LTYPE3, x86.AFCOMW},
|
||||
{"FCOMWP", LTYPE3, x86.AFCOMWP},
|
||||
{"FUCOM", LTYPE3, x86.AFUCOM},
|
||||
{"FUCOMI", LTYPE3, x86.AFUCOMI},
|
||||
{"FUCOMIP", LTYPE3, x86.AFUCOMIP},
|
||||
{"FUCOMP", LTYPE3, x86.AFUCOMP},
|
||||
{"FUCOMPP", LTYPE3, x86.AFUCOMPP},
|
||||
{"FADDW", LTYPE3, x86.AFADDW},
|
||||
{"FADDL", LTYPE3, x86.AFADDL},
|
||||
{"FADDF", LTYPE3, x86.AFADDF},
|
||||
{"FADDD", LTYPE3, x86.AFADDD},
|
||||
{"FADDDP", LTYPE3, x86.AFADDDP},
|
||||
{"FSUBDP", LTYPE3, x86.AFSUBDP},
|
||||
{"FSUBW", LTYPE3, x86.AFSUBW},
|
||||
{"FSUBL", LTYPE3, x86.AFSUBL},
|
||||
{"FSUBF", LTYPE3, x86.AFSUBF},
|
||||
{"FSUBD", LTYPE3, x86.AFSUBD},
|
||||
{"FSUBRDP", LTYPE3, x86.AFSUBRDP},
|
||||
{"FSUBRW", LTYPE3, x86.AFSUBRW},
|
||||
{"FSUBRL", LTYPE3, x86.AFSUBRL},
|
||||
{"FSUBRF", LTYPE3, x86.AFSUBRF},
|
||||
{"FSUBRD", LTYPE3, x86.AFSUBRD},
|
||||
{"FMULDP", LTYPE3, x86.AFMULDP},
|
||||
{"FMULW", LTYPE3, x86.AFMULW},
|
||||
{"FMULL", LTYPE3, x86.AFMULL},
|
||||
{"FMULF", LTYPE3, x86.AFMULF},
|
||||
{"FMULD", LTYPE3, x86.AFMULD},
|
||||
{"FDIVDP", LTYPE3, x86.AFDIVDP},
|
||||
{"FDIVW", LTYPE3, x86.AFDIVW},
|
||||
{"FDIVL", LTYPE3, x86.AFDIVL},
|
||||
{"FDIVF", LTYPE3, x86.AFDIVF},
|
||||
{"FDIVD", LTYPE3, x86.AFDIVD},
|
||||
{"FDIVRDP", LTYPE3, x86.AFDIVRDP},
|
||||
{"FDIVRW", LTYPE3, x86.AFDIVRW},
|
||||
{"FDIVRL", LTYPE3, x86.AFDIVRL},
|
||||
{"FDIVRF", LTYPE3, x86.AFDIVRF},
|
||||
{"FDIVRD", LTYPE3, x86.AFDIVRD},
|
||||
{"FXCHD", LTYPE3, x86.AFXCHD},
|
||||
{"FFREE", LTYPE1, x86.AFFREE},
|
||||
{"FLDCW", LTYPE2, x86.AFLDCW},
|
||||
{"FLDENV", LTYPE1, x86.AFLDENV},
|
||||
{"FRSTOR", LTYPE2, x86.AFRSTOR},
|
||||
{"FSAVE", LTYPE1, x86.AFSAVE},
|
||||
{"FSTCW", LTYPE1, x86.AFSTCW},
|
||||
{"FSTENV", LTYPE1, x86.AFSTENV},
|
||||
{"FSTSW", LTYPE1, x86.AFSTSW},
|
||||
{"F2XM1", LTYPE0, x86.AF2XM1},
|
||||
{"FABS", LTYPE0, x86.AFABS},
|
||||
{"FCHS", LTYPE0, x86.AFCHS},
|
||||
{"FCLEX", LTYPE0, x86.AFCLEX},
|
||||
{"FCOS", LTYPE0, x86.AFCOS},
|
||||
{"FDECSTP", LTYPE0, x86.AFDECSTP},
|
||||
{"FINCSTP", LTYPE0, x86.AFINCSTP},
|
||||
{"FINIT", LTYPE0, x86.AFINIT},
|
||||
{"FLD1", LTYPE0, x86.AFLD1},
|
||||
{"FLDL2E", LTYPE0, x86.AFLDL2E},
|
||||
{"FLDL2T", LTYPE0, x86.AFLDL2T},
|
||||
{"FLDLG2", LTYPE0, x86.AFLDLG2},
|
||||
{"FLDLN2", LTYPE0, x86.AFLDLN2},
|
||||
{"FLDPI", LTYPE0, x86.AFLDPI},
|
||||
{"FLDZ", LTYPE0, x86.AFLDZ},
|
||||
{"FNOP", LTYPE0, x86.AFNOP},
|
||||
{"FPATAN", LTYPE0, x86.AFPATAN},
|
||||
{"FPREM", LTYPE0, x86.AFPREM},
|
||||
{"FPREM1", LTYPE0, x86.AFPREM1},
|
||||
{"FPTAN", LTYPE0, x86.AFPTAN},
|
||||
{"FRNDINT", LTYPE0, x86.AFRNDINT},
|
||||
{"FSCALE", LTYPE0, x86.AFSCALE},
|
||||
{"FSIN", LTYPE0, x86.AFSIN},
|
||||
{"FSINCOS", LTYPE0, x86.AFSINCOS},
|
||||
{"FSQRT", LTYPE0, x86.AFSQRT},
|
||||
{"FTST", LTYPE0, x86.AFTST},
|
||||
{"FXAM", LTYPE0, x86.AFXAM},
|
||||
{"FXTRACT", LTYPE0, x86.AFXTRACT},
|
||||
{"FYL2X", LTYPE0, x86.AFYL2X},
|
||||
{"FYL2XP1", LTYPE0, x86.AFYL2XP1},
|
||||
{"LFENCE", LTYPE0, x86.ALFENCE},
|
||||
{"MFENCE", LTYPE0, x86.AMFENCE},
|
||||
{"SFENCE", LTYPE0, x86.ASFENCE},
|
||||
{"EMMS", LTYPE0, x86.AEMMS},
|
||||
{"PREFETCHT0", LTYPE2, x86.APREFETCHT0},
|
||||
{"PREFETCHT1", LTYPE2, x86.APREFETCHT1},
|
||||
{"PREFETCHT2", LTYPE2, x86.APREFETCHT2},
|
||||
{"PREFETCHNTA", LTYPE2, x86.APREFETCHNTA},
|
||||
{"UNDEF", LTYPE0, obj.AUNDEF},
|
||||
{"ADDPD", LTYPE3, x86.AADDPD},
|
||||
{"ADDPS", LTYPE3, x86.AADDPS},
|
||||
{"ADDSD", LTYPE3, x86.AADDSD},
|
||||
{"ADDSS", LTYPE3, x86.AADDSS},
|
||||
{"AESENC", LTYPE3, x86.AAESENC},
|
||||
{"ANDNPD", LTYPE3, x86.AANDNPD},
|
||||
{"ANDNPS", LTYPE3, x86.AANDNPS},
|
||||
{"ANDPD", LTYPE3, x86.AANDPD},
|
||||
{"ANDPS", LTYPE3, x86.AANDPS},
|
||||
{"CMPPD", LTYPEXC, x86.ACMPPD},
|
||||
{"CMPPS", LTYPEXC, x86.ACMPPS},
|
||||
{"CMPSD", LTYPEXC, x86.ACMPSD},
|
||||
{"CMPSS", LTYPEXC, x86.ACMPSS},
|
||||
{"COMISD", LTYPE3, x86.ACOMISD},
|
||||
{"COMISS", LTYPE3, x86.ACOMISS},
|
||||
{"CVTPL2PD", LTYPE3, x86.ACVTPL2PD},
|
||||
{"CVTPL2PS", LTYPE3, x86.ACVTPL2PS},
|
||||
{"CVTPD2PL", LTYPE3, x86.ACVTPD2PL},
|
||||
{"CVTPD2PS", LTYPE3, x86.ACVTPD2PS},
|
||||
{"CVTPS2PL", LTYPE3, x86.ACVTPS2PL},
|
||||
{"CVTPS2PD", LTYPE3, x86.ACVTPS2PD},
|
||||
{"CVTSD2SL", LTYPE3, x86.ACVTSD2SL},
|
||||
{"CVTSD2SS", LTYPE3, x86.ACVTSD2SS},
|
||||
{"CVTSL2SD", LTYPE3, x86.ACVTSL2SD},
|
||||
{"CVTSL2SS", LTYPE3, x86.ACVTSL2SS},
|
||||
{"CVTSS2SD", LTYPE3, x86.ACVTSS2SD},
|
||||
{"CVTSS2SL", LTYPE3, x86.ACVTSS2SL},
|
||||
{"CVTTPD2PL", LTYPE3, x86.ACVTTPD2PL},
|
||||
{"CVTTPS2PL", LTYPE3, x86.ACVTTPS2PL},
|
||||
{"CVTTSD2SL", LTYPE3, x86.ACVTTSD2SL},
|
||||
{"CVTTSS2SL", LTYPE3, x86.ACVTTSS2SL},
|
||||
{"DIVPD", LTYPE3, x86.ADIVPD},
|
||||
{"DIVPS", LTYPE3, x86.ADIVPS},
|
||||
{"DIVSD", LTYPE3, x86.ADIVSD},
|
||||
{"DIVSS", LTYPE3, x86.ADIVSS},
|
||||
{"MASKMOVOU", LTYPE3, x86.AMASKMOVOU},
|
||||
{"MASKMOVDQU", LTYPE3, x86.AMASKMOVOU}, /* syn */
|
||||
{"MAXPD", LTYPE3, x86.AMAXPD},
|
||||
{"MAXPS", LTYPE3, x86.AMAXPS},
|
||||
{"MAXSD", LTYPE3, x86.AMAXSD},
|
||||
{"MAXSS", LTYPE3, x86.AMAXSS},
|
||||
{"MINPD", LTYPE3, x86.AMINPD},
|
||||
{"MINPS", LTYPE3, x86.AMINPS},
|
||||
{"MINSD", LTYPE3, x86.AMINSD},
|
||||
{"MINSS", LTYPE3, x86.AMINSS},
|
||||
{"MOVAPD", LTYPE3, x86.AMOVAPD},
|
||||
{"MOVAPS", LTYPE3, x86.AMOVAPS},
|
||||
{"MOVO", LTYPE3, x86.AMOVO},
|
||||
{"MOVOA", LTYPE3, x86.AMOVO}, /* syn */
|
||||
{"MOVOU", LTYPE3, x86.AMOVOU},
|
||||
{"MOVHLPS", LTYPE3, x86.AMOVHLPS},
|
||||
{"MOVHPD", LTYPE3, x86.AMOVHPD},
|
||||
{"MOVHPS", LTYPE3, x86.AMOVHPS},
|
||||
{"MOVLHPS", LTYPE3, x86.AMOVLHPS},
|
||||
{"MOVLPD", LTYPE3, x86.AMOVLPD},
|
||||
{"MOVLPS", LTYPE3, x86.AMOVLPS},
|
||||
{"MOVMSKPD", LTYPE3, x86.AMOVMSKPD},
|
||||
{"MOVMSKPS", LTYPE3, x86.AMOVMSKPS},
|
||||
{"MOVNTO", LTYPE3, x86.AMOVNTO},
|
||||
{"MOVNTDQ", LTYPE3, x86.AMOVNTO}, /* syn */
|
||||
{"MOVNTPD", LTYPE3, x86.AMOVNTPD},
|
||||
{"MOVNTPS", LTYPE3, x86.AMOVNTPS},
|
||||
{"MOVSD", LTYPE3, x86.AMOVSD},
|
||||
{"MOVSS", LTYPE3, x86.AMOVSS},
|
||||
{"MOVUPD", LTYPE3, x86.AMOVUPD},
|
||||
{"MOVUPS", LTYPE3, x86.AMOVUPS},
|
||||
{"MULPD", LTYPE3, x86.AMULPD},
|
||||
{"MULPS", LTYPE3, x86.AMULPS},
|
||||
{"MULSD", LTYPE3, x86.AMULSD},
|
||||
{"MULSS", LTYPE3, x86.AMULSS},
|
||||
{"ORPD", LTYPE3, x86.AORPD},
|
||||
{"ORPS", LTYPE3, x86.AORPS},
|
||||
{"PADDQ", LTYPE3, x86.APADDQ},
|
||||
{"PAND", LTYPE3, x86.APAND},
|
||||
{"PCMPEQB", LTYPE3, x86.APCMPEQB},
|
||||
{"PMAXSW", LTYPE3, x86.APMAXSW},
|
||||
{"PMAXUB", LTYPE3, x86.APMAXUB},
|
||||
{"PMINSW", LTYPE3, x86.APMINSW},
|
||||
{"PMINUB", LTYPE3, x86.APMINUB},
|
||||
{"PMOVMSKB", LTYPE3, x86.APMOVMSKB},
|
||||
{"PSADBW", LTYPE3, x86.APSADBW},
|
||||
{"PSHUFB", LTYPE3, x86.APSHUFB},
|
||||
{"PSHUFHW", LTYPEX, x86.APSHUFHW},
|
||||
{"PSHUFL", LTYPEX, x86.APSHUFL},
|
||||
{"PSHUFLW", LTYPEX, x86.APSHUFLW},
|
||||
{"PSUBB", LTYPE3, x86.APSUBB},
|
||||
{"PSUBL", LTYPE3, x86.APSUBL},
|
||||
{"PSUBQ", LTYPE3, x86.APSUBQ},
|
||||
{"PSUBSB", LTYPE3, x86.APSUBSB},
|
||||
{"PSUBSW", LTYPE3, x86.APSUBSW},
|
||||
{"PSUBUSB", LTYPE3, x86.APSUBUSB},
|
||||
{"PSUBUSW", LTYPE3, x86.APSUBUSW},
|
||||
{"PSUBW", LTYPE3, x86.APSUBW},
|
||||
{"PUNPCKHQDQ", LTYPE3, x86.APUNPCKHQDQ},
|
||||
{"PUNPCKLQDQ", LTYPE3, x86.APUNPCKLQDQ},
|
||||
{"PXOR", LTYPE3, x86.APXOR},
|
||||
{"RCPPS", LTYPE3, x86.ARCPPS},
|
||||
{"RCPSS", LTYPE3, x86.ARCPSS},
|
||||
{"RSQRTPS", LTYPE3, x86.ARSQRTPS},
|
||||
{"RSQRTSS", LTYPE3, x86.ARSQRTSS},
|
||||
{"SQRTPD", LTYPE3, x86.ASQRTPD},
|
||||
{"SQRTPS", LTYPE3, x86.ASQRTPS},
|
||||
{"SQRTSD", LTYPE3, x86.ASQRTSD},
|
||||
{"SQRTSS", LTYPE3, x86.ASQRTSS},
|
||||
{"SUBPD", LTYPE3, x86.ASUBPD},
|
||||
{"SUBPS", LTYPE3, x86.ASUBPS},
|
||||
{"SUBSD", LTYPE3, x86.ASUBSD},
|
||||
{"SUBSS", LTYPE3, x86.ASUBSS},
|
||||
{"UCOMISD", LTYPE3, x86.AUCOMISD},
|
||||
{"UCOMISS", LTYPE3, x86.AUCOMISS},
|
||||
{"UNPCKHPD", LTYPE3, x86.AUNPCKHPD},
|
||||
{"UNPCKHPS", LTYPE3, x86.AUNPCKHPS},
|
||||
{"UNPCKLPD", LTYPE3, x86.AUNPCKLPD},
|
||||
{"UNPCKLPS", LTYPE3, x86.AUNPCKLPS},
|
||||
{"XORPD", LTYPE3, x86.AXORPD},
|
||||
{"XORPS", LTYPE3, x86.AXORPS},
|
||||
{"USEFIELD", LTYPEN, obj.AUSEFIELD},
|
||||
{"PCDATA", LTYPEPC, obj.APCDATA},
|
||||
{"FUNCDATA", LTYPEF, obj.AFUNCDATA},
|
||||
}
|
||||
|
||||
func cinit() {
|
||||
nullgen.Type = x86.REG_NONE
|
||||
nullgen.Index = x86.REG_NONE
|
||||
}
|
||||
|
||||
func checkscale(scale int16) {
|
||||
switch scale {
|
||||
case 1,
|
||||
2,
|
||||
4,
|
||||
8:
|
||||
return
|
||||
}
|
||||
|
||||
yyerror("scale must be 1248: %d", scale)
|
||||
}
|
||||
|
||||
func syminit(s *asm.Sym) {
|
||||
s.Type = LNAME
|
||||
s.Value = 0
|
||||
}
|
||||
|
||||
func cclean() {
|
||||
var g2 Addr2
|
||||
|
||||
g2.from = nullgen
|
||||
g2.to = nullgen
|
||||
outcode(obj.AEND, &g2)
|
||||
}
|
||||
|
||||
var lastpc *obj.Prog
|
||||
|
||||
type Addr2 struct {
|
||||
from obj.Addr
|
||||
to obj.Addr
|
||||
}
|
||||
|
||||
func outcode(a int, g2 *Addr2) {
|
||||
var p *obj.Prog
|
||||
var pl *obj.Plist
|
||||
|
||||
if asm.Pass == 1 {
|
||||
goto out
|
||||
}
|
||||
|
||||
p = new(obj.Prog)
|
||||
*p = obj.Prog{}
|
||||
p.Ctxt = asm.Ctxt
|
||||
p.As = int16(a)
|
||||
p.Lineno = stmtline
|
||||
p.From = g2.from
|
||||
p.To = g2.to
|
||||
p.Pc = int64(asm.PC)
|
||||
|
||||
if lastpc == nil {
|
||||
pl = obj.Linknewplist(asm.Ctxt)
|
||||
pl.Firstpc = p
|
||||
} else {
|
||||
|
||||
lastpc.Link = p
|
||||
}
|
||||
lastpc = p
|
||||
|
||||
out:
|
||||
if a != obj.AGLOBL && a != obj.ADATA {
|
||||
asm.PC++
|
||||
}
|
||||
}
|
||||
1509
src/cmd/old8a/y.go
1509
src/cmd/old8a/y.go
File diff suppressed because it is too large
Load Diff
1066
src/cmd/old9a/a.y
1066
src/cmd/old9a/a.y
File diff suppressed because it is too large
Load Diff
|
|
@ -1,560 +0,0 @@
|
|||
// cmd/9a/lex.c from Vita Nuova.
|
||||
//
|
||||
// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
|
||||
// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
|
||||
// Portions Copyright © 1997-1999 Vita Nuova Limited
|
||||
// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)
|
||||
// Portions Copyright © 2004,2006 Bruce Ellis
|
||||
// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
|
||||
// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others
|
||||
// Portions Copyright © 2009 The Go Authors. All rights reserved.
|
||||
//
|
||||
// Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
// of this software and associated documentation files (the "Software"), to deal
|
||||
// in the Software without restriction, including without limitation the rights
|
||||
// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
// copies of the Software, and to permit persons to whom the Software is
|
||||
// furnished to do so, subject to the following conditions:
|
||||
//
|
||||
// The above copyright notice and this permission notice shall be included in
|
||||
// all copies or substantial portions of the Software.
|
||||
//
|
||||
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
// THE SOFTWARE.
|
||||
|
||||
//go:generate go tool yacc a.y
|
||||
|
||||
package main
|
||||
|
||||
import (
|
||||
"cmd/internal/asm"
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/obj/ppc64"
|
||||
)
|
||||
|
||||
var (
|
||||
yyerror = asm.Yyerror
|
||||
nullgen obj.Addr
|
||||
stmtline int32
|
||||
)
|
||||
|
||||
func main() {
|
||||
cinit()
|
||||
|
||||
asm.LSCONST = LSCONST
|
||||
asm.LCONST = LCONST
|
||||
asm.LFCONST = LFCONST
|
||||
asm.LNAME = LNAME
|
||||
asm.LVAR = LVAR
|
||||
asm.LLAB = LLAB
|
||||
|
||||
asm.Lexinit = lexinit
|
||||
asm.Cclean = cclean
|
||||
asm.Yyparse = yyparse
|
||||
|
||||
asm.Thechar = '9'
|
||||
asm.Thestring = "ppc64"
|
||||
asm.Thelinkarch = &ppc64.Linkppc64
|
||||
asm.Arches = map[string]*obj.LinkArch{
|
||||
"ppc64le": &ppc64.Linkppc64le,
|
||||
}
|
||||
|
||||
asm.Main()
|
||||
}
|
||||
|
||||
type yy struct{}
|
||||
|
||||
func (yy) Lex(v *yySymType) int {
|
||||
var av asm.Yylval
|
||||
tok := asm.Yylex(&av)
|
||||
v.sym = av.Sym
|
||||
v.lval = av.Lval
|
||||
v.sval = av.Sval
|
||||
v.dval = av.Dval
|
||||
return tok
|
||||
}
|
||||
|
||||
func (yy) Error(msg string) {
|
||||
asm.Yyerror("%s", msg)
|
||||
}
|
||||
|
||||
func yyparse() {
|
||||
nosched = 0
|
||||
yyParse(yy{})
|
||||
}
|
||||
|
||||
var lexinit = []asm.Lextab{
|
||||
{"SP", LSP, obj.NAME_AUTO},
|
||||
{"SB", LSB, obj.NAME_EXTERN},
|
||||
{"FP", LFP, obj.NAME_PARAM},
|
||||
{"PC", LPC, obj.TYPE_BRANCH},
|
||||
{"LR", LLR, ppc64.REG_LR},
|
||||
{"CTR", LCTR, ppc64.REG_CTR},
|
||||
{"XER", LSPREG, ppc64.REG_XER},
|
||||
{"MSR", LMSR, ppc64.REG_MSR},
|
||||
{"FPSCR", LFPSCR, ppc64.REG_FPSCR},
|
||||
{"SPR", LSPR, ppc64.REG_SPR0},
|
||||
{"DCR", LSPR, ppc64.REG_DCR0},
|
||||
{"CR", LCR, ppc64.REG_CR},
|
||||
{"CR0", LCREG, ppc64.REG_CR0},
|
||||
{"CR1", LCREG, ppc64.REG_CR1},
|
||||
{"CR2", LCREG, ppc64.REG_CR2},
|
||||
{"CR3", LCREG, ppc64.REG_CR3},
|
||||
{"CR4", LCREG, ppc64.REG_CR4},
|
||||
{"CR5", LCREG, ppc64.REG_CR5},
|
||||
{"CR6", LCREG, ppc64.REG_CR6},
|
||||
{"CR7", LCREG, ppc64.REG_CR7},
|
||||
{"R", LR, 0},
|
||||
{"R0", LREG, ppc64.REG_R0},
|
||||
{"R1", LREG, ppc64.REG_R1},
|
||||
{"R2", LREG, ppc64.REG_R2},
|
||||
{"R3", LREG, ppc64.REG_R3},
|
||||
{"R4", LREG, ppc64.REG_R4},
|
||||
{"R5", LREG, ppc64.REG_R5},
|
||||
{"R6", LREG, ppc64.REG_R6},
|
||||
{"R7", LREG, ppc64.REG_R7},
|
||||
{"R8", LREG, ppc64.REG_R8},
|
||||
{"R9", LREG, ppc64.REG_R9},
|
||||
{"R10", LREG, ppc64.REG_R10},
|
||||
{"R11", LREG, ppc64.REG_R11},
|
||||
{"R12", LREG, ppc64.REG_R12},
|
||||
{"R13", LREG, ppc64.REG_R13},
|
||||
{"R14", LREG, ppc64.REG_R14},
|
||||
{"R15", LREG, ppc64.REG_R15},
|
||||
{"R16", LREG, ppc64.REG_R16},
|
||||
{"R17", LREG, ppc64.REG_R17},
|
||||
{"R18", LREG, ppc64.REG_R18},
|
||||
{"R19", LREG, ppc64.REG_R19},
|
||||
{"R20", LREG, ppc64.REG_R20},
|
||||
{"R21", LREG, ppc64.REG_R21},
|
||||
{"R22", LREG, ppc64.REG_R22},
|
||||
{"R23", LREG, ppc64.REG_R23},
|
||||
{"R24", LREG, ppc64.REG_R24},
|
||||
{"R25", LREG, ppc64.REG_R25},
|
||||
{"R26", LREG, ppc64.REG_R26},
|
||||
{"R27", LREG, ppc64.REG_R27},
|
||||
{"R28", LREG, ppc64.REG_R28},
|
||||
{"R29", LREG, ppc64.REG_R29},
|
||||
{"g", LREG, ppc64.REG_R30}, // avoid unintentionally clobbering g using R30
|
||||
{"R31", LREG, ppc64.REG_R31},
|
||||
{"F", LF, 0},
|
||||
{"F0", LFREG, ppc64.REG_F0},
|
||||
{"F1", LFREG, ppc64.REG_F1},
|
||||
{"F2", LFREG, ppc64.REG_F2},
|
||||
{"F3", LFREG, ppc64.REG_F3},
|
||||
{"F4", LFREG, ppc64.REG_F4},
|
||||
{"F5", LFREG, ppc64.REG_F5},
|
||||
{"F6", LFREG, ppc64.REG_F6},
|
||||
{"F7", LFREG, ppc64.REG_F7},
|
||||
{"F8", LFREG, ppc64.REG_F8},
|
||||
{"F9", LFREG, ppc64.REG_F9},
|
||||
{"F10", LFREG, ppc64.REG_F10},
|
||||
{"F11", LFREG, ppc64.REG_F11},
|
||||
{"F12", LFREG, ppc64.REG_F12},
|
||||
{"F13", LFREG, ppc64.REG_F13},
|
||||
{"F14", LFREG, ppc64.REG_F14},
|
||||
{"F15", LFREG, ppc64.REG_F15},
|
||||
{"F16", LFREG, ppc64.REG_F16},
|
||||
{"F17", LFREG, ppc64.REG_F17},
|
||||
{"F18", LFREG, ppc64.REG_F18},
|
||||
{"F19", LFREG, ppc64.REG_F19},
|
||||
{"F20", LFREG, ppc64.REG_F20},
|
||||
{"F21", LFREG, ppc64.REG_F21},
|
||||
{"F22", LFREG, ppc64.REG_F22},
|
||||
{"F23", LFREG, ppc64.REG_F23},
|
||||
{"F24", LFREG, ppc64.REG_F24},
|
||||
{"F25", LFREG, ppc64.REG_F25},
|
||||
{"F26", LFREG, ppc64.REG_F26},
|
||||
{"F27", LFREG, ppc64.REG_F27},
|
||||
{"F28", LFREG, ppc64.REG_F28},
|
||||
{"F29", LFREG, ppc64.REG_F29},
|
||||
{"F30", LFREG, ppc64.REG_F30},
|
||||
{"F31", LFREG, ppc64.REG_F31},
|
||||
{"CREQV", LCROP, ppc64.ACREQV},
|
||||
{"CRXOR", LCROP, ppc64.ACRXOR},
|
||||
{"CRAND", LCROP, ppc64.ACRAND},
|
||||
{"CROR", LCROP, ppc64.ACROR},
|
||||
{"CRANDN", LCROP, ppc64.ACRANDN},
|
||||
{"CRORN", LCROP, ppc64.ACRORN},
|
||||
{"CRNAND", LCROP, ppc64.ACRNAND},
|
||||
{"CRNOR", LCROP, ppc64.ACRNOR},
|
||||
{"ADD", LADDW, ppc64.AADD},
|
||||
{"ADDV", LADDW, ppc64.AADDV},
|
||||
{"ADDCC", LADDW, ppc64.AADDCC},
|
||||
{"ADDVCC", LADDW, ppc64.AADDVCC},
|
||||
{"ADDC", LADDW, ppc64.AADDC},
|
||||
{"ADDCV", LADDW, ppc64.AADDCV},
|
||||
{"ADDCCC", LADDW, ppc64.AADDCCC},
|
||||
{"ADDCVCC", LADDW, ppc64.AADDCVCC},
|
||||
{"ADDE", LLOGW, ppc64.AADDE},
|
||||
{"ADDEV", LLOGW, ppc64.AADDEV},
|
||||
{"ADDECC", LLOGW, ppc64.AADDECC},
|
||||
{"ADDEVCC", LLOGW, ppc64.AADDEVCC},
|
||||
{"ADDME", LABS, ppc64.AADDME},
|
||||
{"ADDMEV", LABS, ppc64.AADDMEV},
|
||||
{"ADDMECC", LABS, ppc64.AADDMECC},
|
||||
{"ADDMEVCC", LABS, ppc64.AADDMEVCC},
|
||||
{"ADDZE", LABS, ppc64.AADDZE},
|
||||
{"ADDZEV", LABS, ppc64.AADDZEV},
|
||||
{"ADDZECC", LABS, ppc64.AADDZECC},
|
||||
{"ADDZEVCC", LABS, ppc64.AADDZEVCC},
|
||||
{"SUB", LADDW, ppc64.ASUB},
|
||||
{"SUBV", LADDW, ppc64.ASUBV},
|
||||
{"SUBCC", LADDW, ppc64.ASUBCC},
|
||||
{"SUBVCC", LADDW, ppc64.ASUBVCC},
|
||||
{"SUBE", LLOGW, ppc64.ASUBE},
|
||||
{"SUBECC", LLOGW, ppc64.ASUBECC},
|
||||
{"SUBEV", LLOGW, ppc64.ASUBEV},
|
||||
{"SUBEVCC", LLOGW, ppc64.ASUBEVCC},
|
||||
{"SUBC", LADDW, ppc64.ASUBC},
|
||||
{"SUBCCC", LADDW, ppc64.ASUBCCC},
|
||||
{"SUBCV", LADDW, ppc64.ASUBCV},
|
||||
{"SUBCVCC", LADDW, ppc64.ASUBCVCC},
|
||||
{"SUBME", LABS, ppc64.ASUBME},
|
||||
{"SUBMEV", LABS, ppc64.ASUBMEV},
|
||||
{"SUBMECC", LABS, ppc64.ASUBMECC},
|
||||
{"SUBMEVCC", LABS, ppc64.ASUBMEVCC},
|
||||
{"SUBZE", LABS, ppc64.ASUBZE},
|
||||
{"SUBZEV", LABS, ppc64.ASUBZEV},
|
||||
{"SUBZECC", LABS, ppc64.ASUBZECC},
|
||||
{"SUBZEVCC", LABS, ppc64.ASUBZEVCC},
|
||||
{"AND", LADDW, ppc64.AAND},
|
||||
{"ANDCC", LADDW, ppc64.AANDCC}, /* includes andil & andiu */
|
||||
{"ANDN", LLOGW, ppc64.AANDN},
|
||||
{"ANDNCC", LLOGW, ppc64.AANDNCC},
|
||||
{"EQV", LLOGW, ppc64.AEQV},
|
||||
{"EQVCC", LLOGW, ppc64.AEQVCC},
|
||||
{"NAND", LLOGW, ppc64.ANAND},
|
||||
{"NANDCC", LLOGW, ppc64.ANANDCC},
|
||||
{"NOR", LLOGW, ppc64.ANOR},
|
||||
{"NORCC", LLOGW, ppc64.ANORCC},
|
||||
{"OR", LADDW, ppc64.AOR}, /* includes oril & oriu */
|
||||
{"ORCC", LADDW, ppc64.AORCC},
|
||||
{"ORN", LLOGW, ppc64.AORN},
|
||||
{"ORNCC", LLOGW, ppc64.AORNCC},
|
||||
{"XOR", LADDW, ppc64.AXOR}, /* includes xoril & xoriu */
|
||||
{"XORCC", LLOGW, ppc64.AXORCC},
|
||||
{"EXTSB", LABS, ppc64.AEXTSB},
|
||||
{"EXTSBCC", LABS, ppc64.AEXTSBCC},
|
||||
{"EXTSH", LABS, ppc64.AEXTSH},
|
||||
{"EXTSHCC", LABS, ppc64.AEXTSHCC},
|
||||
{"CNTLZW", LABS, ppc64.ACNTLZW},
|
||||
{"CNTLZWCC", LABS, ppc64.ACNTLZWCC},
|
||||
{"RLWMI", LRLWM, ppc64.ARLWMI},
|
||||
{"RLWMICC", LRLWM, ppc64.ARLWMICC},
|
||||
{"RLWNM", LRLWM, ppc64.ARLWNM},
|
||||
{"RLWNMCC", LRLWM, ppc64.ARLWNMCC},
|
||||
{"SLW", LSHW, ppc64.ASLW},
|
||||
{"SLWCC", LSHW, ppc64.ASLWCC},
|
||||
{"SRW", LSHW, ppc64.ASRW},
|
||||
{"SRWCC", LSHW, ppc64.ASRWCC},
|
||||
{"SRAW", LSHW, ppc64.ASRAW},
|
||||
{"SRAWCC", LSHW, ppc64.ASRAWCC},
|
||||
{"BR", LBRA, ppc64.ABR},
|
||||
{"JMP", LBRA, ppc64.ABR},
|
||||
{"BC", LBRA, ppc64.ABC},
|
||||
{"BCL", LBRA, ppc64.ABC},
|
||||
{"BL", LBRA, ppc64.ABL},
|
||||
{"CALL", LBRA, ppc64.ABL},
|
||||
{"BEQ", LBRA, ppc64.ABEQ},
|
||||
{"BNE", LBRA, ppc64.ABNE},
|
||||
{"BGT", LBRA, ppc64.ABGT},
|
||||
{"BGE", LBRA, ppc64.ABGE},
|
||||
{"BLT", LBRA, ppc64.ABLT},
|
||||
{"BLE", LBRA, ppc64.ABLE},
|
||||
{"BVC", LBRA, ppc64.ABVC},
|
||||
{"BVS", LBRA, ppc64.ABVS},
|
||||
{"CMP", LCMP, ppc64.ACMP},
|
||||
{"CMPU", LCMP, ppc64.ACMPU},
|
||||
{"CMPW", LCMP, ppc64.ACMPW},
|
||||
{"CMPWU", LCMP, ppc64.ACMPWU},
|
||||
{"DIVW", LLOGW, ppc64.ADIVW},
|
||||
{"DIVWV", LLOGW, ppc64.ADIVWV},
|
||||
{"DIVWCC", LLOGW, ppc64.ADIVWCC},
|
||||
{"DIVWVCC", LLOGW, ppc64.ADIVWVCC},
|
||||
{"DIVWU", LLOGW, ppc64.ADIVWU},
|
||||
{"DIVWUV", LLOGW, ppc64.ADIVWUV},
|
||||
{"DIVWUCC", LLOGW, ppc64.ADIVWUCC},
|
||||
{"DIVWUVCC", LLOGW, ppc64.ADIVWUVCC},
|
||||
{"FABS", LFCONV, ppc64.AFABS},
|
||||
{"FABSCC", LFCONV, ppc64.AFABSCC},
|
||||
{"FNEG", LFCONV, ppc64.AFNEG},
|
||||
{"FNEGCC", LFCONV, ppc64.AFNEGCC},
|
||||
{"FNABS", LFCONV, ppc64.AFNABS},
|
||||
{"FNABSCC", LFCONV, ppc64.AFNABSCC},
|
||||
{"FADD", LFADD, ppc64.AFADD},
|
||||
{"FADDCC", LFADD, ppc64.AFADDCC},
|
||||
{"FSUB", LFADD, ppc64.AFSUB},
|
||||
{"FSUBCC", LFADD, ppc64.AFSUBCC},
|
||||
{"FMUL", LFADD, ppc64.AFMUL},
|
||||
{"FMULCC", LFADD, ppc64.AFMULCC},
|
||||
{"FDIV", LFADD, ppc64.AFDIV},
|
||||
{"FDIVCC", LFADD, ppc64.AFDIVCC},
|
||||
{"FRSP", LFCONV, ppc64.AFRSP},
|
||||
{"FRSPCC", LFCONV, ppc64.AFRSPCC},
|
||||
{"FCTIW", LFCONV, ppc64.AFCTIW},
|
||||
{"FCTIWCC", LFCONV, ppc64.AFCTIWCC},
|
||||
{"FCTIWZ", LFCONV, ppc64.AFCTIWZ},
|
||||
{"FCTIWZCC", LFCONV, ppc64.AFCTIWZCC},
|
||||
{"FMADD", LFMA, ppc64.AFMADD},
|
||||
{"FMADDCC", LFMA, ppc64.AFMADDCC},
|
||||
{"FMSUB", LFMA, ppc64.AFMSUB},
|
||||
{"FMSUBCC", LFMA, ppc64.AFMSUBCC},
|
||||
{"FNMADD", LFMA, ppc64.AFNMADD},
|
||||
{"FNMADDCC", LFMA, ppc64.AFNMADDCC},
|
||||
{"FNMSUB", LFMA, ppc64.AFNMSUB},
|
||||
{"FNMSUBCC", LFMA, ppc64.AFNMSUBCC},
|
||||
{"FMADDS", LFMA, ppc64.AFMADDS},
|
||||
{"FMADDSCC", LFMA, ppc64.AFMADDSCC},
|
||||
{"FMSUBS", LFMA, ppc64.AFMSUBS},
|
||||
{"FMSUBSCC", LFMA, ppc64.AFMSUBSCC},
|
||||
{"FNMADDS", LFMA, ppc64.AFNMADDS},
|
||||
{"FNMADDSCC", LFMA, ppc64.AFNMADDSCC},
|
||||
{"FNMSUBS", LFMA, ppc64.AFNMSUBS},
|
||||
{"FNMSUBSCC", LFMA, ppc64.AFNMSUBSCC},
|
||||
{"FCMPU", LFCMP, ppc64.AFCMPU},
|
||||
{"FCMPO", LFCMP, ppc64.AFCMPO},
|
||||
{"MTFSB0", LMTFSB, ppc64.AMTFSB0},
|
||||
{"MTFSB1", LMTFSB, ppc64.AMTFSB1},
|
||||
{"FMOVD", LFMOV, ppc64.AFMOVD},
|
||||
{"FMOVS", LFMOV, ppc64.AFMOVS},
|
||||
{"FMOVDCC", LFCONV, ppc64.AFMOVDCC}, /* fmr. */
|
||||
{"GLOBL", LGLOBL, obj.AGLOBL},
|
||||
{"MOVB", LMOVB, ppc64.AMOVB},
|
||||
{"MOVBZ", LMOVB, ppc64.AMOVBZ},
|
||||
{"MOVBU", LMOVB, ppc64.AMOVBU},
|
||||
{"MOVBZU", LMOVB, ppc64.AMOVBZU},
|
||||
{"MOVH", LMOVB, ppc64.AMOVH},
|
||||
{"MOVHZ", LMOVB, ppc64.AMOVHZ},
|
||||
{"MOVHU", LMOVB, ppc64.AMOVHU},
|
||||
{"MOVHZU", LMOVB, ppc64.AMOVHZU},
|
||||
{"MOVHBR", LXMV, ppc64.AMOVHBR},
|
||||
{"MOVWBR", LXMV, ppc64.AMOVWBR},
|
||||
{"MOVW", LMOVW, ppc64.AMOVW},
|
||||
{"MOVWU", LMOVW, ppc64.AMOVWU},
|
||||
{"MOVMW", LMOVMW, ppc64.AMOVMW},
|
||||
{"MOVFL", LMOVW, ppc64.AMOVFL},
|
||||
{"MULLW", LADDW, ppc64.AMULLW}, /* includes multiply immediate 10-139 */
|
||||
{"MULLWV", LLOGW, ppc64.AMULLWV},
|
||||
{"MULLWCC", LLOGW, ppc64.AMULLWCC},
|
||||
{"MULLWVCC", LLOGW, ppc64.AMULLWVCC},
|
||||
{"MULHW", LLOGW, ppc64.AMULHW},
|
||||
{"MULHWCC", LLOGW, ppc64.AMULHWCC},
|
||||
{"MULHWU", LLOGW, ppc64.AMULHWU},
|
||||
{"MULHWUCC", LLOGW, ppc64.AMULHWUCC},
|
||||
{"NEG", LABS, ppc64.ANEG},
|
||||
{"NEGV", LABS, ppc64.ANEGV},
|
||||
{"NEGCC", LABS, ppc64.ANEGCC},
|
||||
{"NEGVCC", LABS, ppc64.ANEGVCC},
|
||||
{"NOP", LNOP, obj.ANOP}, /* ori 0,0,0 */
|
||||
{"SYSCALL", LNOP, ppc64.ASYSCALL},
|
||||
{"UNDEF", LNOP, obj.AUNDEF},
|
||||
{"RET", LRETRN, obj.ARET},
|
||||
{"RETURN", LRETRN, obj.ARET},
|
||||
{"RFI", LRETRN, ppc64.ARFI},
|
||||
{"RFCI", LRETRN, ppc64.ARFCI},
|
||||
{"DATA", LDATA, obj.ADATA},
|
||||
{"END", LEND, obj.AEND},
|
||||
{"TEXT", LTEXT, obj.ATEXT},
|
||||
|
||||
/* 64-bit instructions */
|
||||
{"CNTLZD", LABS, ppc64.ACNTLZD},
|
||||
{"CNTLZDCC", LABS, ppc64.ACNTLZDCC},
|
||||
{"DIVD", LLOGW, ppc64.ADIVD},
|
||||
{"DIVDCC", LLOGW, ppc64.ADIVDCC},
|
||||
{"DIVDVCC", LLOGW, ppc64.ADIVDVCC},
|
||||
{"DIVDV", LLOGW, ppc64.ADIVDV},
|
||||
{"DIVDU", LLOGW, ppc64.ADIVDU},
|
||||
{"DIVDUCC", LLOGW, ppc64.ADIVDUCC},
|
||||
{"DIVDUVCC", LLOGW, ppc64.ADIVDUVCC},
|
||||
{"DIVDUV", LLOGW, ppc64.ADIVDUV},
|
||||
{"EXTSW", LABS, ppc64.AEXTSW},
|
||||
{"EXTSWCC", LABS, ppc64.AEXTSWCC},
|
||||
{"FCTID", LFCONV, ppc64.AFCTID},
|
||||
{"FCTIDCC", LFCONV, ppc64.AFCTIDCC},
|
||||
{"FCTIDZ", LFCONV, ppc64.AFCTIDZ},
|
||||
{"FCTIDZCC", LFCONV, ppc64.AFCTIDZCC},
|
||||
{"FCFID", LFCONV, ppc64.AFCFID},
|
||||
{"FCFIDCC", LFCONV, ppc64.AFCFIDCC},
|
||||
{"LDAR", LXLD, ppc64.ALDAR},
|
||||
{"MOVD", LMOVW, ppc64.AMOVD},
|
||||
{"MOVDU", LMOVW, ppc64.AMOVDU},
|
||||
{"MOVWZ", LMOVW, ppc64.AMOVWZ},
|
||||
{"MOVWZU", LMOVW, ppc64.AMOVWZU},
|
||||
{"MULHD", LLOGW, ppc64.AMULHD},
|
||||
{"MULHDCC", LLOGW, ppc64.AMULHDCC},
|
||||
{"MULHDU", LLOGW, ppc64.AMULHDU},
|
||||
{"MULHDUCC", LLOGW, ppc64.AMULHDUCC},
|
||||
{"MULLD", LADDW, ppc64.AMULLD}, /* includes multiply immediate? */
|
||||
{"MULLDCC", LLOGW, ppc64.AMULLDCC},
|
||||
{"MULLDVCC", LLOGW, ppc64.AMULLDVCC},
|
||||
{"MULLDV", LLOGW, ppc64.AMULLDV},
|
||||
{"RFID", LRETRN, ppc64.ARFID},
|
||||
{"HRFID", LRETRN, ppc64.AHRFID},
|
||||
{"RLDMI", LRLWM, ppc64.ARLDMI},
|
||||
{"RLDMICC", LRLWM, ppc64.ARLDMICC},
|
||||
{"RLDC", LRLWM, ppc64.ARLDC},
|
||||
{"RLDCCC", LRLWM, ppc64.ARLDCCC},
|
||||
{"RLDCR", LRLWM, ppc64.ARLDCR},
|
||||
{"RLDCRCC", LRLWM, ppc64.ARLDCRCC},
|
||||
{"RLDCL", LRLWM, ppc64.ARLDCL},
|
||||
{"RLDCLCC", LRLWM, ppc64.ARLDCLCC},
|
||||
{"SLBIA", LNOP, ppc64.ASLBIA},
|
||||
{"SLBIE", LNOP, ppc64.ASLBIE},
|
||||
{"SLBMFEE", LABS, ppc64.ASLBMFEE},
|
||||
{"SLBMFEV", LABS, ppc64.ASLBMFEV},
|
||||
{"SLBMTE", LABS, ppc64.ASLBMTE},
|
||||
{"SLD", LSHW, ppc64.ASLD},
|
||||
{"SLDCC", LSHW, ppc64.ASLDCC},
|
||||
{"SRD", LSHW, ppc64.ASRD},
|
||||
{"SRAD", LSHW, ppc64.ASRAD},
|
||||
{"SRADCC", LSHW, ppc64.ASRADCC},
|
||||
{"SRDCC", LSHW, ppc64.ASRDCC},
|
||||
{"STDCCC", LXST, ppc64.ASTDCCC},
|
||||
{"TD", LADDW, ppc64.ATD},
|
||||
|
||||
/* pseudo instructions */
|
||||
{"REM", LLOGW, ppc64.AREM},
|
||||
{"REMCC", LLOGW, ppc64.AREMCC},
|
||||
{"REMV", LLOGW, ppc64.AREMV},
|
||||
{"REMVCC", LLOGW, ppc64.AREMVCC},
|
||||
{"REMU", LLOGW, ppc64.AREMU},
|
||||
{"REMUCC", LLOGW, ppc64.AREMUCC},
|
||||
{"REMUV", LLOGW, ppc64.AREMUV},
|
||||
{"REMUVCC", LLOGW, ppc64.AREMUVCC},
|
||||
{"REMD", LLOGW, ppc64.AREMD},
|
||||
{"REMDCC", LLOGW, ppc64.AREMDCC},
|
||||
{"REMDV", LLOGW, ppc64.AREMDV},
|
||||
{"REMDVCC", LLOGW, ppc64.AREMDVCC},
|
||||
{"REMDU", LLOGW, ppc64.AREMDU},
|
||||
{"REMDUCC", LLOGW, ppc64.AREMDUCC},
|
||||
{"REMDUV", LLOGW, ppc64.AREMDUV},
|
||||
{"REMDUVCC", LLOGW, ppc64.AREMDUVCC},
|
||||
|
||||
/* special instructions */
|
||||
{"DCBF", LXOP, ppc64.ADCBF},
|
||||
{"DCBI", LXOP, ppc64.ADCBI},
|
||||
{"DCBST", LXOP, ppc64.ADCBST},
|
||||
{"DCBT", LXOP, ppc64.ADCBT},
|
||||
{"DCBTST", LXOP, ppc64.ADCBTST},
|
||||
{"DCBZ", LXOP, ppc64.ADCBZ},
|
||||
{"ICBI", LXOP, ppc64.AICBI},
|
||||
{"ECIWX", LXLD, ppc64.AECIWX},
|
||||
{"ECOWX", LXST, ppc64.AECOWX},
|
||||
{"LWAR", LXLD, ppc64.ALWAR},
|
||||
{"STWCCC", LXST, ppc64.ASTWCCC},
|
||||
{"EIEIO", LRETRN, ppc64.AEIEIO},
|
||||
{"TLBIE", LNOP, ppc64.ATLBIE},
|
||||
{"TLBIEL", LNOP, ppc64.ATLBIEL},
|
||||
{"LSW", LXLD, ppc64.ALSW},
|
||||
{"STSW", LXST, ppc64.ASTSW},
|
||||
{"ISYNC", LRETRN, ppc64.AISYNC},
|
||||
{"SYNC", LRETRN, ppc64.ASYNC},
|
||||
{"TLBSYNC", LRETRN, ppc64.ATLBSYNC},
|
||||
{"PTESYNC", LRETRN, ppc64.APTESYNC},
|
||||
|
||||
/* "TW", LADDW, ATW,*/
|
||||
{"WORD", LWORD, ppc64.AWORD},
|
||||
{"DWORD", LWORD, ppc64.ADWORD},
|
||||
{"SCHED", LSCHED, 0},
|
||||
{"NOSCHED", LSCHED, 0x80},
|
||||
{"PCDATA", LPCDAT, obj.APCDATA},
|
||||
{"FUNCDATA", LFUNCDAT, obj.AFUNCDATA},
|
||||
}
|
||||
|
||||
func cinit() {
|
||||
}
|
||||
|
||||
func cclean() {
|
||||
outcode(obj.AEND, &nullgen, 0, &nullgen)
|
||||
}
|
||||
|
||||
var lastpc *obj.Prog
|
||||
var nosched int
|
||||
|
||||
func outcode(a int, g1 *obj.Addr, reg int, g2 *obj.Addr) {
|
||||
var p *obj.Prog
|
||||
var pl *obj.Plist
|
||||
|
||||
if asm.Pass == 1 {
|
||||
goto out
|
||||
}
|
||||
|
||||
if g1.Scale != 0 {
|
||||
if reg != 0 || g2.Scale != 0 {
|
||||
yyerror("bad addressing modes")
|
||||
}
|
||||
reg = int(g1.Scale)
|
||||
} else if g2.Scale != 0 {
|
||||
if reg != 0 {
|
||||
yyerror("bad addressing modes")
|
||||
}
|
||||
reg = int(g2.Scale)
|
||||
}
|
||||
|
||||
p = asm.Ctxt.NewProg()
|
||||
p.As = int16(a)
|
||||
p.Lineno = stmtline
|
||||
if nosched != 0 {
|
||||
p.Mark |= ppc64.NOSCHED
|
||||
}
|
||||
p.From = *g1
|
||||
p.Reg = int16(reg)
|
||||
p.To = *g2
|
||||
p.Pc = int64(asm.PC)
|
||||
|
||||
if lastpc == nil {
|
||||
pl = obj.Linknewplist(asm.Ctxt)
|
||||
pl.Firstpc = p
|
||||
} else {
|
||||
lastpc.Link = p
|
||||
}
|
||||
lastpc = p
|
||||
|
||||
out:
|
||||
if a != obj.AGLOBL && a != obj.ADATA {
|
||||
asm.PC++
|
||||
}
|
||||
}
|
||||
|
||||
func outgcode(a int, g1 *obj.Addr, reg int, g2, g3 *obj.Addr) {
|
||||
var p *obj.Prog
|
||||
var pl *obj.Plist
|
||||
|
||||
if asm.Pass == 1 {
|
||||
goto out
|
||||
}
|
||||
|
||||
p = asm.Ctxt.NewProg()
|
||||
p.As = int16(a)
|
||||
p.Lineno = stmtline
|
||||
if nosched != 0 {
|
||||
p.Mark |= ppc64.NOSCHED
|
||||
}
|
||||
p.From = *g1
|
||||
p.Reg = int16(reg)
|
||||
if g2.Type != 0 {
|
||||
p.From3 = new(obj.Addr)
|
||||
*p.From3 = *g2
|
||||
}
|
||||
p.To = *g3
|
||||
p.Pc = int64(asm.PC)
|
||||
|
||||
if lastpc == nil {
|
||||
pl = obj.Linknewplist(asm.Ctxt)
|
||||
pl.Firstpc = p
|
||||
} else {
|
||||
lastpc.Link = p
|
||||
}
|
||||
lastpc = p
|
||||
|
||||
out:
|
||||
if a != obj.AGLOBL && a != obj.ADATA {
|
||||
asm.PC++
|
||||
}
|
||||
}
|
||||
2028
src/cmd/old9a/y.go
2028
src/cmd/old9a/y.go
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue