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cmd/asm: ppc64le support for ISEL for use by SSA
This adds the support for the ppc64le isel instruction so it can be used by SSA. Fixed #16771 Change-Id: Ia2517f0834ff5e7ad927e218b84493e0106ab4a7 Reviewed-on: https://go-review.googlesource.com/28611 Reviewed-by: David Chase <drchase@google.com> Run-TryBot: David Chase <drchase@google.com> TryBot-Result: Gobot Gobot <gobot@golang.org>
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@ -39,6 +39,10 @@ func IsPPC64RLD(op obj.As) bool {
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return false
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}
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func IsPPC64ISEL(op obj.As) bool {
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return op == ppc64.AISEL
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}
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// IsPPC64CMP reports whether the op (as defined by an ppc64.A* constant) is
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// one of the CMP instructions that require special handling.
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func IsPPC64CMP(op obj.As) bool {
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@ -673,15 +673,24 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
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prog.To = a[3]
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break
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}
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if p.arch.Family == sys.PPC64 && arch.IsPPC64RLD(op) {
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// 2nd operand must always be a register.
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// TODO: Do we need to guard this with the instruction type?
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// That is, are there 4-operand instructions without this property?
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.From3 = newAddr(a[2])
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prog.To = a[3]
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break
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if p.arch.Family == sys.PPC64 {
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if arch.IsPPC64RLD(op) {
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// 2nd operand must always be a register.
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// TODO: Do we need to guard this with the instruction type?
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// That is, are there 4-operand instructions without this property?
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prog.From = a[0]
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prog.Reg = p.getRegister(prog, op, &a[1])
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prog.From3 = newAddr(a[2])
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prog.To = a[3]
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break
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} else if arch.IsPPC64ISEL(op) {
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// ISEL BC,RB,RA,RT becomes isel rt,ra,rb,bc
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prog.From3 = newAddr(a[2]) // ra
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prog.From = a[0] // bc
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prog.Reg = p.getRegister(prog, op, &a[1]) // rb
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prog.To = a[3] // rt
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break
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}
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}
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if p.arch.Family == sys.S390X {
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prog.From = a[1]
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@ -347,6 +347,7 @@ const (
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AFSUBCC
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AFSUBS
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AFSUBSCC
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AISEL
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AMOVMW
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ALBAR
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ALSW
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@ -119,6 +119,7 @@ var Anames = []string{
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"FSUBCC",
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"FSUBS",
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"FSUBSCC",
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"ISEL",
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"MOVMW",
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"LBAR",
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"LSW",
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@ -323,6 +323,8 @@ var optab = []Optab{
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{AADDME, C_REG, C_NONE, C_NONE, C_REG, 47, 4, 0},
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{AEXTSB, C_REG, C_NONE, C_NONE, C_REG, 48, 4, 0},
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{AEXTSB, C_NONE, C_NONE, C_NONE, C_REG, 48, 4, 0},
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{AISEL, C_LCON, C_REG, C_REG, C_REG, 84, 4, 0},
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{AISEL, C_ZCON, C_REG, C_REG, C_REG, 84, 4, 0},
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{ANEG, C_REG, C_NONE, C_NONE, C_REG, 47, 4, 0},
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{ANEG, C_NONE, C_NONE, C_NONE, C_REG, 47, 4, 0},
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{AREM, C_REG, C_NONE, C_NONE, C_REG, 50, 12, 0},
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@ -1167,6 +1169,9 @@ func buildop(ctxt *obj.Link) {
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case AFCMPO:
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opset(AFCMPU, r0)
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case AISEL:
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opset(AISEL, r0)
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case AMTFSB0:
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opset(AMTFSB0CC, r0)
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opset(AMTFSB1, r0)
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@ -1350,6 +1355,10 @@ func OP_RLW(op uint32, a uint32, s uint32, sh uint32, mb uint32, me uint32) uint
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return op | (s&31)<<21 | (a&31)<<16 | (sh&31)<<11 | (mb&31)<<6 | (me&31)<<1
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}
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func AOP_ISEL(op uint32, t uint32, a uint32, b uint32, bc uint32) uint32 {
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return op | (t&31)<<21 | (a&31)<<16 | (b&31)<<11 | (bc&0x1F)<<6
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}
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const (
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/* each rhs is OPVCC(_, _, _, _) */
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OP_ADD = 31<<26 | 266<<1 | 0<<10 | 0
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@ -1359,6 +1368,7 @@ const (
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OP_EXTSB = 31<<26 | 954<<1 | 0<<10 | 0
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OP_EXTSH = 31<<26 | 922<<1 | 0<<10 | 0
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OP_EXTSW = 31<<26 | 986<<1 | 0<<10 | 0
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OP_ISEL = 31<<26 | 15<<1 | 0<<10 | 0
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OP_MCRF = 19<<26 | 0<<1 | 0<<10 | 0
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OP_MCRFS = 63<<26 | 64<<1 | 0<<10 | 0
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OP_MCRXR = 31<<26 | 512<<1 | 0<<10 | 0
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@ -2522,6 +2532,11 @@ func asmout(ctxt *obj.Link, p *obj.Prog, o *Optab, out []uint32) {
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rel.Siz = 8
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rel.Sym = p.From.Sym
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rel.Type = obj.R_ADDRPOWER_GOT
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case 84: // ISEL BC,RA,RB,RT -> isel rt,ra,rb,bc
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bc := vregoff(ctxt, &p.From)
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// rt = To.Reg, ra = p.Reg, rb = p.From3.Reg
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o1 = AOP_ISEL(OP_ISEL, uint32(p.To.Reg), uint32(p.Reg), uint32(p.From3.Reg), uint32(bc))
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}
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out[0] = o1
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