mirror of https://github.com/golang/go.git
cmd/internal/obj/loong64, cmd/link/internal: switch to LoongArch ELF psABI v2 relocs
The LoongArch ELF psABI v2 [1] relocs are vastly simplified from the v1 which involved a stack machine for computing the reloc values, but the details of PC-relative addressing are changed as well. Specifically, the `pcaddu12i` instruction is substituted with the `pcalau12i`, which is like arm64's `adrp` -- meaning the lower bits of a symbol's address now have to be absolute and not PC-relative. However, apart from the little bit of added complexity, the obvious advantage is that only 1 reloc needs to be emitted for every kind of external reloc we care about. This can mean substantial space savings (each RELA reloc occupies 24 bytes), and no open-coded stack ops has to remain any more. While at it, update the preset value for the output ELF's flags to indicate the psABI update. Fixes #58784 [1]: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html Change-Id: I5c13bc710eaf58293a32e930dd33feff2ef14c28 Reviewed-on: https://go-review.googlesource.com/c/go/+/455017 Run-TryBot: Ben Shi <powerman1st@163.com> Reviewed-by: xiaodong liu <teaofmoli@gmail.com> Reviewed-by: abner chenc <chenguoqi@loongson.cn> Run-TryBot: Ian Lance Taylor <iant@google.com> Reviewed-by: Meidan Li <limeidan@loongson.cn> Auto-Submit: Ian Lance Taylor <iant@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Cherry Mui <cherryyz@google.com> Reviewed-by: Ian Lance Taylor <iant@google.com>
This commit is contained in:
WANG Xuerui
Gopher Robot
parent
4bd77619b7
commit
a3dd959229
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@ -61,22 +61,22 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
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XOR $-1, R4 // 1efcbf0284f81500
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MOVH R4, R5 // 85c04000a5c04800
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// relocation instructions
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MOVW R4, name(SB) // 1e00001cc4038029
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MOVWU R4, name(SB) // 1e00001cc4038029
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MOVV R4, name(SB) // 1e00001cc403c029
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MOVB R4, name(SB) // 1e00001cc4030029
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MOVBU R4, name(SB) // 1e00001cc4030029
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MOVF F4, name(SB) // 1e00001cc403402b
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MOVD F4, name(SB) // 1e00001cc403c02b
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MOVW name(SB), R4 // 1e00001cc4038028
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MOVWU name(SB), R4 // 1e00001cc403802a
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MOVV name(SB), R4 // 1e00001cc403c028
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MOVB name(SB), R4 // 1e00001cc4030028
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MOVBU name(SB), R4 // 1e00001cc403002a
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MOVF name(SB), F4 // 1e00001cc403002b
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MOVD name(SB), F4 // 1e00001cc403802b
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MOVH R4, name(SB) // 1e00001cc4034029
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MOVH name(SB), R4 // 1e00001cc4034028
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MOVHU R4, name(SB) // 1e00001cc4034029
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MOVHU name(SB), R4 // 1e00001cc403402a
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// relocation instructions
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MOVW R4, name(SB) // 1e00001ac4038029
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MOVWU R4, name(SB) // 1e00001ac4038029
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MOVV R4, name(SB) // 1e00001ac403c029
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MOVB R4, name(SB) // 1e00001ac4030029
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MOVBU R4, name(SB) // 1e00001ac4030029
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MOVF F4, name(SB) // 1e00001ac403402b
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MOVD F4, name(SB) // 1e00001ac403c02b
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MOVW name(SB), R4 // 1e00001ac4038028
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MOVWU name(SB), R4 // 1e00001ac403802a
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MOVV name(SB), R4 // 1e00001ac403c028
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MOVB name(SB), R4 // 1e00001ac4030028
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MOVBU name(SB), R4 // 1e00001ac403002a
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MOVF name(SB), F4 // 1e00001ac403002b
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MOVD name(SB), F4 // 1e00001ac403802b
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MOVH R4, name(SB) // 1e00001ac4034029
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MOVH name(SB), R4 // 1e00001ac4034028
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MOVHU R4, name(SB) // 1e00001ac4034029
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MOVHU name(SB), R4 // 1e00001ac403402a
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@ -1540,8 +1540,8 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
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o1 = c.oprrr(ABREAK)
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// relocation operations
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case 50: // mov r,addr ==> pcaddu12i + sw
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o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP))
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case 50: // mov r,addr ==> pcalau12i + sw
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o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP))
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rel := obj.Addrel(c.cursym)
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rel.Off = int32(c.pc)
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rel.Siz = 4
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@ -1557,8 +1557,8 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
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rel2.Add = p.To.Offset
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rel2.Type = objabi.R_ADDRLOONG64
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case 51: // mov addr,r ==> pcaddu12i + lw
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o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(REGTMP))
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case 51: // mov addr,r ==> pcalau12i + lw
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o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(REGTMP))
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rel := obj.Addrel(c.cursym)
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rel.Off = int32(c.pc)
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rel.Siz = 4
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@ -1576,7 +1576,7 @@ func (c *ctxt0) asmout(p *obj.Prog, o *Optab, out []uint32) {
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case 52: // mov $lext, r
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// NOTE: this case does not use REGTMP. If it ever does,
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// remove the NOTUSETMP flag in optab.
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o1 = OP_IR(c.opir(APCADDU12I), uint32(0), uint32(p.To.Reg))
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o1 = OP_IR(c.opir(APCALAU12I), uint32(0), uint32(p.To.Reg))
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rel := obj.Addrel(c.cursym)
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rel.Off = int32(c.pc)
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rel.Siz = 4
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@ -254,7 +254,7 @@ func Elfinit(ctxt *Link) {
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ehdr.Flags = 0x20000004 /* MIPS 3 CPIC */
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}
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if ctxt.Arch.Family == sys.Loong64 {
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ehdr.Flags = 0x3 /* LoongArch lp64d */
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ehdr.Flags = 0x43 /* DOUBLE_FLOAT, OBJABI_V1 */
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}
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if ctxt.Arch.Family == sys.RISCV64 {
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ehdr.Flags = 0x4 /* RISCV Float ABI Double */
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@ -46,100 +46,28 @@ func elfreloc1(ctxt *ld.Link, out *ld.OutBuf, ldr *loader.Loader, s loader.Sym,
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}
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case objabi.R_ADDRLOONG64TLS:
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_TPREL) | uint64(elfsym)<<32)
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out.Write64(uint64(elf.R_LARCH_TLS_LE_LO12) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE))
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out.Write64(uint64(0xfff))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_AND))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_POP_32_U_10_12))
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out.Write64(uint64(0x0))
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case objabi.R_ADDRLOONG64TLSU:
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_TLS_TPREL) | uint64(elfsym)<<32)
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out.Write64(uint64(elf.R_LARCH_TLS_LE_HI20) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE))
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out.Write64(uint64(0xc))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_SR))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20) | uint64(0)<<32)
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out.Write64(uint64(0x0))
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case objabi.R_CALLLOONG64:
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PLT_PCREL) | uint64(elfsym)<<32)
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out.Write64(uint64(elf.R_LARCH_B26) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_0_10_10_16_S2))
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out.Write64(uint64(0x0))
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// The pcaddu12i + addi.d instructions is used to obtain address of a symbol on Loong64.
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// The low 12-bit of the symbol address need to be added. The addi.d instruction have
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// signed 12-bit immediate operand. The 0x800 (addr+U12 <=> addr+0x800+S12) is introduced
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// to do sign extending from 12 bits. The 0x804 is 0x800 + 4, 4 is instruction bit
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// width on Loong64 and is used to correct the PC of the addi.d instruction.
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case objabi.R_ADDRLOONG64:
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd + 0x4))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd + 0x804))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE))
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out.Write64(uint64(0xc))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_SR))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE))
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out.Write64(uint64(0xc))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_SL))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_SUB))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_10_12))
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out.Write64(uint64(0x0))
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out.Write64(uint64(elf.R_LARCH_PCALA_LO12) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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case objabi.R_ADDRLOONG64U:
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_PCREL) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd + 0x800))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_PUSH_ABSOLUTE))
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out.Write64(uint64(0xc))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_SR))
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out.Write64(uint64(0x0))
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out.Write64(uint64(sectoff))
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out.Write64(uint64(elf.R_LARCH_SOP_POP_32_S_5_20) | uint64(0)<<32)
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out.Write64(uint64(0x0))
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out.Write64(uint64(elf.R_LARCH_PCALA_HI20) | uint64(elfsym)<<32)
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out.Write64(uint64(r.Xadd))
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}
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return true
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@ -156,7 +84,6 @@ func machoreloc1(*sys.Arch, *ld.OutBuf, *loader.Loader, loader.Sym, loader.ExtRe
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func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loader.Reloc, s loader.Sym, val int64) (o int64, nExtReloc int, ok bool) {
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rs := r.Sym()
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if target.IsExternal() {
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nExtReloc := 0
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switch r.Type() {
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default:
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return val, 0, false
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@ -168,20 +95,12 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
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if rst != sym.SHOSTOBJ && rst != sym.SDYNIMPORT && ldr.SymSect(rs) == nil {
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ldr.Errorf(s, "missing section for %s", ldr.SymName(rs))
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}
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nExtReloc = 8 // need 8 ELF relocations. see elfreloc1
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if r.Type() == objabi.R_ADDRLOONG64U {
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nExtReloc = 4
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}
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return val, nExtReloc, true
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return val, 1, true
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case objabi.R_ADDRLOONG64TLS,
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objabi.R_ADDRLOONG64TLSU,
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objabi.R_CALLLOONG64,
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objabi.R_JMPLOONG64:
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nExtReloc = 4
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if r.Type() == objabi.R_CALLLOONG64 || r.Type() == objabi.R_JMPLOONG64 {
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nExtReloc = 2
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}
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return val, nExtReloc, true
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return val, 1, true
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}
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}
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@ -196,11 +115,11 @@ func archreloc(target *ld.Target, ldr *loader.Loader, syms *ld.ArchSyms, r loade
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case objabi.R_ADDRLOONG64,
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objabi.R_ADDRLOONG64U:
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pc := ldr.SymValue(s) + int64(r.Off())
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t := ldr.SymAddr(rs) + r.Add() - pc
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t := calculatePCAlignedReloc(r.Type(), ldr.SymAddr(rs)+r.Add(), pc)
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if r.Type() == objabi.R_ADDRLOONG64 {
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return int64(val&0xffc003ff | (((t + 4 - ((t + 4 + 1<<11) >> 12 << 12)) << 10) & 0x3ffc00)), noExtReloc, isOk
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return int64(val&0xffc003ff | (t << 10)), noExtReloc, isOk
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}
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return int64(val&0xfe00001f | (((t + 1<<11) >> 12 << 5) & 0x1ffffe0)), noExtReloc, isOk
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return int64(val&0xfe00001f | (t << 5)), noExtReloc, isOk
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case objabi.R_ADDRLOONG64TLS,
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objabi.R_ADDRLOONG64TLSU:
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t := ldr.SymAddr(rs) + r.Add()
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@ -238,3 +157,33 @@ func extreloc(target *ld.Target, ldr *loader.Loader, r loader.Reloc, s loader.Sy
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}
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return loader.ExtReloc{}, false
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}
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func isRequestingLowPageBits(t objabi.RelocType) bool {
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switch t {
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case objabi.R_ADDRLOONG64:
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return true
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}
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return false
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}
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// Calculates the value to put into the immediate slot, according to the
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// desired relocation type, target and PC.
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// The value to use varies based on the reloc type. Namely, the absolute low
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// bits of the target are to be used for the low part, while the page-aligned
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// offset is to be used for the higher part. A "page" here is not related to
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// the system's actual page size, but rather a fixed 12-bit range (designed to
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// cooperate with ADDI/LD/ST's 12-bit immediates).
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func calculatePCAlignedReloc(t objabi.RelocType, tgt int64, pc int64) int64 {
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if isRequestingLowPageBits(t) {
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// corresponding immediate field is 12 bits wide
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return tgt & 0xfff
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}
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pageDelta := (tgt >> 12) - (pc >> 12)
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if tgt&0xfff >= 0x800 {
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// adjust for sign-extended addition of the low bits
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pageDelta += 1
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}
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// corresponding immediate field is 20 bits wide
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return pageDelta & 0xfffff
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}
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