mirror
/
go
mirror of https://github.com/golang/go.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

new convention, direction bit is 

always left cleared. changed
compiler generated memcpy and
memset to assume CLD.

R=r
OCL=21215
CL=21215
This commit is contained in:
Ken Thompson 2008-12-15 15:07:35 -08:00
parent ae5a475e20
commit 8f53bc0612
3 changed files with 29 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/cmd/6g/cgen.c
View File

@ -874,22 +874,29 @@ sgen(Node *n, Node *ns, int32 w)
gins(AREP, N, N); // repeat
gins(AMOVSQ, N, N); // MOVQ *(SI)-,*(DI)-
}
// for future optimization
// we leave with the flag clear
gins(ACLD, N, N);
} else {
// normal direction
gins(ACLD, N, N); // clear direction flag
if(q > 0) {
if(q >= 4) {
gconreg(AMOVQ, q, D_CX);
gins(AREP, N, N); // repeat
gins(AMOVSQ, N, N); // MOVQ *(SI)+,*(DI)+
} else
while(q > 0) {
gins(AMOVSQ, N, N); // MOVQ *(SI)+,*(DI)+
q--;
}
if(c > 0) {
if(c >= 4) {
gconreg(AMOVQ, c, D_CX);
gins(AREP, N, N); // repeat
gins(AMOVSB, N, N); // MOVB *(SI)+,*(DI)+
} else
while(c > 0) {
gins(AMOVSB, N, N); // MOVB *(SI)+,*(DI)+
c--;
}
}
}

33
src/cmd/6g/gen.c
View File

@ -1037,7 +1037,7 @@ cgen_as(Node *nl, Node *nr, int op)
{
Node nc, n1;
Type *tl;
uint32 w, c;
uint32 w, c, q;
int iszer;
if(nl == N)
@ -1058,31 +1058,32 @@ cgen_as(Node *nl, Node *nr, int op)
if(debug['g'])
dump("\nclearfat", nl);
if(nl->type->width < 0)
fatal("clearfat %T %lld", nl->type, nl->type->width);
w = nl->type->width;
c = w % 8; // bytes
q = w / 8; // quads
if(w > 0)
gconreg(AMOVQ, 0, D_AX);
gconreg(AMOVQ, 0, D_AX);
nodreg(&n1, types[tptr], D_DI);
agen(nl, &n1);
if(w > 0) {
nodreg(&n1, types[tptr], D_DI);
agen(nl, &n1);
gins(ACLD, N, N); // clear direction flag
}
c = w / 8;
if(c > 0) {
gconreg(AMOVQ, c, D_CX);
if(q >= 4) {
gconreg(AMOVQ, q, D_CX);
gins(AREP, N, N); // repeat
gins(ASTOSQ, N, N); // STOQ AL,*(DI)+
} else
while(q > 0) {
gins(ASTOSQ, N, N); // STOQ AL,*(DI)+
q--;
}
c = w % 8;
if(c > 0) {
if(c >= 4) {
gconreg(AMOVQ, c, D_CX);
gins(AREP, N, N); // repeat
gins(ASTOSB, N, N); // STOB AL,*(DI)+
} else
while(c > 0) {
gins(ASTOSB, N, N); // STOB AL,*(DI)+
c--;
}
goto ret;
}

1
src/runtime/rt0_amd64.s
View File

@ -26,6 +26,7 @@ TEXT _rt0_amd64(SB),7,$-8
MOVQ AX, 0(R15) // 0(R15) is stack limit (w 104b guard)
MOVQ SP, 8(R15) // 8(R15) is base
CLD // convention is D is always left cleared
CALL check(SB)
MOVL 16(SP), AX // copy argc