mirror of https://github.com/golang/go.git
internal/cpu: detect support of AVX512
Extracts changes from that were submitted in other CLs to enable AVX512 detection, notably: - https://go-review.googlesource.com/c/go/+/271521 - https://go-review.googlesource.com/c/go/+/379394 - https://go-review.googlesource.com/c/go/+/502476 This change adds properties to the cpu.X86 fields to enable runtime detection of AVX512, and the hasAVX512F, hasAVX512BW, and hasAVX512VL macros to support bypassing runtime checks in assembly code when GOAMD64=v4 is set. Change-Id: Ia7c3f22f1e66bf1de575aba522cb0d0a55ce791f Reviewed-on: https://go-review.googlesource.com/c/go/+/536257 Reviewed-by: Keith Randall <khr@golang.org> Reviewed-by: Martin Möhrmann <martin@golang.org> TryBot-Result: Gopher Robot <gobot@golang.org> Auto-Submit: Martin Möhrmann <martin@golang.org> Reviewed-by: Keith Randall <khr@google.com> Run-TryBot: Martin Möhrmann <moehrmann@google.com> Commit-Queue: Martin Möhrmann <martin@golang.org> Reviewed-by: Martin Möhrmann <moehrmann@google.com>
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@ -29,6 +29,9 @@ var X86 struct {
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HasADX bool
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HasAVX bool
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HasAVX2 bool
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HasAVX512F bool
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HasAVX512BW bool
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HasAVX512VL bool
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HasBMI1 bool
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HasBMI2 bool
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HasERMS bool
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@ -34,12 +34,15 @@ const (
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cpuid_AVX = 1 << 28
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// ebx bits
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cpuid_BMI1 = 1 << 3
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cpuid_AVX2 = 1 << 5
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cpuid_BMI2 = 1 << 8
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cpuid_ERMS = 1 << 9
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cpuid_ADX = 1 << 19
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cpuid_SHA = 1 << 29
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cpuid_BMI1 = 1 << 3
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cpuid_AVX2 = 1 << 5
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cpuid_BMI2 = 1 << 8
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cpuid_ERMS = 1 << 9
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cpuid_AVX512F = 1 << 16
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cpuid_ADX = 1 << 19
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cpuid_SHA = 1 << 29
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cpuid_AVX512BW = 1 << 30
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cpuid_AVX512VL = 1 << 31
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// edx bits for CPUID 0x80000001
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cpuid_RDTSCP = 1 << 27
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@ -77,6 +80,15 @@ func doinit() {
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option{Name: "bmi2", Feature: &X86.HasBMI2},
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option{Name: "fma", Feature: &X86.HasFMA})
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}
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if level < 4 {
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// These options are required at level 4. At lower levels
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// they can be turned off.
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options = append(options,
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option{Name: "avx512f", Feature: &X86.HasAVX512F},
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option{Name: "avx512bw", Feature: &X86.HasAVX512BW},
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option{Name: "avx512vl", Feature: &X86.HasAVX512VL},
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)
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}
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maxID, _, _, _ := cpuid(0, 0)
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@ -108,11 +120,18 @@ func doinit() {
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X86.HasFMA = isSet(ecx1, cpuid_FMA) && X86.HasOSXSAVE
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osSupportsAVX := false
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osSupportsAVX512 := false
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// For XGETBV, OSXSAVE bit is required and sufficient.
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if X86.HasOSXSAVE {
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eax, _ := xgetbv()
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// Check if XMM and YMM registers have OS support.
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osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)
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// AVX512 detection does not work on Darwin,
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// see https://github.com/golang/go/issues/49233
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//
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// Check if opmask, ZMMhi256 and Hi16_ZMM have OS support.
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osSupportsAVX512 = osSupportsAVX && isSet(eax, 1<<5) && isSet(eax, 1<<6) && isSet(eax, 1<<7)
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}
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X86.HasAVX = isSet(ecx1, cpuid_AVX) && osSupportsAVX
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@ -129,6 +148,12 @@ func doinit() {
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X86.HasADX = isSet(ebx7, cpuid_ADX)
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X86.HasSHA = isSet(ebx7, cpuid_SHA)
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X86.HasAVX512F = isSet(ebx7, cpuid_AVX512F) && osSupportsAVX512
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if X86.HasAVX512F {
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X86.HasAVX512BW = isSet(ebx7, cpuid_AVX512BW)
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X86.HasAVX512VL = isSet(ebx7, cpuid_AVX512VL)
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}
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var maxExtendedInformation uint32
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maxExtendedInformation, _, _, _ = cpuid(0x80000000, 0)
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@ -18,6 +18,24 @@ func TestX86ifAVX2hasAVX(t *testing.T) {
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}
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}
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func TestX86ifAVX512FhasAVX2(t *testing.T) {
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if X86.HasAVX512F && !X86.HasAVX2 {
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t.Fatalf("HasAVX2 expected true when HasAVX512F is true, got false")
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}
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}
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func TestX86ifAVX512BWhasAVX512F(t *testing.T) {
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if X86.HasAVX512BW && !X86.HasAVX512F {
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t.Fatalf("HasAVX512F expected true when HasAVX512BW is true, got false")
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}
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}
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func TestX86ifAVX512VLhasAVX512F(t *testing.T) {
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if X86.HasAVX512VL && !X86.HasAVX512F {
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t.Fatalf("HasAVX512F expected true when HasAVX512VL is true, got false")
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}
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}
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func TestDisableSSE3(t *testing.T) {
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if GetGOAMD64level() > 1 {
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t.Skip("skipping test: can't run on GOAMD64>v1 machines")
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@ -20,6 +20,9 @@
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#ifdef GOAMD64_v4
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#define hasAVX
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#define hasAVX2
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#define hasAVX512F
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#define hasAVX512BW
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#define hasAVX512VL
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#define hasPOPCNT
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#define hasSSE42
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#endif
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@ -144,12 +144,12 @@ GLOBL bad_cpu_msg<>(SB), RODATA, $84
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#define commpage64_base_address 0x00007fffffe00000
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#define commpage64_cpu_capabilities64 (commpage64_base_address+0x010)
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#define commpage64_version (commpage64_base_address+0x01E)
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#define hasAVX512F 0x0000004000000000
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#define hasAVX512CD 0x0000008000000000
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#define hasAVX512DQ 0x0000010000000000
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#define hasAVX512BW 0x0000020000000000
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#define hasAVX512VL 0x0000100000000000
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#define NEED_DARWIN_SUPPORT (hasAVX512F | hasAVX512DQ | hasAVX512CD | hasAVX512BW | hasAVX512VL)
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#define AVX512F 0x0000004000000000
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#define AVX512CD 0x0000008000000000
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#define AVX512DQ 0x0000010000000000
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#define AVX512BW 0x0000020000000000
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#define AVX512VL 0x0000100000000000
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#define NEED_DARWIN_SUPPORT (AVX512F | AVX512DQ | AVX512CD | AVX512BW | AVX512VL)
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#else
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#define NEED_OS_SUPPORT_AX V4_OS_SUPPORT_AX
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#endif
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