mirror of https://github.com/golang/go.git
[dev.simd] cmd/compile: generated codes for amd64 SIMD
This CL is generated by tool in CL 667155. Change-Id: I3829d0d2c96fe7000e2dd025a3006f96957d777a Reviewed-on: https://go-review.googlesource.com/c/go/+/675618 Reviewed-by: Junyang Shao <shaojunyang@google.com> Auto-Submit: Junyang Shao <shaojunyang@google.com> Reviewed-by: David Chase <drchase@google.com> LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
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// Code generated by internal/simd/_gen using 'go run .'; DO NOT EDIT.
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// Code generated by x/arch/internal/simdgen using 'go run . -xedPath $XED_PATH -o godefs -goroot $GOROOT go.yaml types.yaml categories.yaml'; DO NOT EDIT.
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package main
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func simdAMD64Ops(fp11, fp21, fp2m1, fp1m1fp1, fp2m1fp1, fp2m1m1 regInfo) []opData {
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func simdAMD64Ops(fp1fp1, fp2fp1, fp2m1, fp1m1fp1, fp2m1fp1, fp2m1m1 regInfo) []opData {
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return []opData{
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// {name: "VPADDB", argLength: 2, reg: fp21, asm: "VPADDB", commutative: true},
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// etc, generated
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{name: "VADDPS512", argLength: 2, reg: fp2fp1, asm: "VADDPS", commutative: true, typ: "Vec512"},
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{name: "VANDPS512", argLength: 2, reg: fp2fp1, asm: "VANDPS", commutative: true, typ: "Vec512"},
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{name: "VANDNPS512", argLength: 2, reg: fp2fp1, asm: "VANDNPS", commutative: true, typ: "Vec512"},
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{name: "VRCP14PS512", argLength: 1, reg: fp1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec512"},
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{name: "VRSQRT14PS512", argLength: 1, reg: fp1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec512"},
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{name: "VDIVPS512", argLength: 2, reg: fp2fp1, asm: "VDIVPS", commutative: false, typ: "Vec512"},
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{name: "VANDPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VANDPS", commutative: true, typ: "Vec512"},
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{name: "VANDNPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VANDNPS", commutative: true, typ: "Vec512"},
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{name: "VRCP14PSMasked512", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec512"},
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{name: "VRSQRT14PSMasked512", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec512"},
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{name: "VDIVPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VDIVPS", commutative: false, typ: "Vec512"},
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{name: "VMAXPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMAXPS", commutative: true, typ: "Vec512"},
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{name: "VMINPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMINPS", commutative: true, typ: "Vec512"},
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{name: "VMULPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMULPS", commutative: true, typ: "Vec512"},
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{name: "VSCALEFPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec512"},
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{name: "VORPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VORPS", commutative: true, typ: "Vec512"},
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{name: "VSQRTPSMasked512", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec512"},
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{name: "VADDPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VADDPS", commutative: false, typ: "Vec512"},
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{name: "VXORPSMasked512", argLength: 3, reg: fp2m1fp1, asm: "VXORPS", commutative: true, typ: "Vec512"},
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{name: "VMAXPS512", argLength: 2, reg: fp2fp1, asm: "VMAXPS", commutative: true, typ: "Vec512"},
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{name: "VMINPS512", argLength: 2, reg: fp2fp1, asm: "VMINPS", commutative: true, typ: "Vec512"},
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{name: "VMULPS512", argLength: 2, reg: fp2fp1, asm: "VMULPS", commutative: true, typ: "Vec512"},
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{name: "VSCALEFPS512", argLength: 2, reg: fp2fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec512"},
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{name: "VORPS512", argLength: 2, reg: fp2fp1, asm: "VORPS", commutative: true, typ: "Vec512"},
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{name: "VSQRTPS512", argLength: 1, reg: fp1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec512"},
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{name: "VXORPS512", argLength: 2, reg: fp2fp1, asm: "VXORPS", commutative: true, typ: "Vec512"},
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{name: "VANDPS128", argLength: 2, reg: fp2fp1, asm: "VANDPS", commutative: true, typ: "Vec128"},
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{name: "VANDNPS128", argLength: 2, reg: fp2fp1, asm: "VANDNPS", commutative: true, typ: "Vec128"},
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{name: "VRCP14PS128", argLength: 1, reg: fp1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec128"},
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{name: "VRSQRTPS128", argLength: 1, reg: fp1fp1, asm: "VRSQRTPS", commutative: false, typ: "Vec128"},
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{name: "VDIVPS128", argLength: 2, reg: fp2fp1, asm: "VDIVPS", commutative: false, typ: "Vec128"},
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{name: "VADDPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VADDPS", commutative: true, typ: "Vec128"},
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{name: "VANDPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VANDPS", commutative: true, typ: "Vec128"},
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{name: "VANDNPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VANDNPS", commutative: true, typ: "Vec128"},
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{name: "VRCP14PSMasked128", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec128"},
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{name: "VRSQRT14PSMasked128", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec128"},
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{name: "VDIVPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VDIVPS", commutative: false, typ: "Vec128"},
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{name: "VMAXPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMAXPS", commutative: true, typ: "Vec128"},
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{name: "VMINPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMINPS", commutative: true, typ: "Vec128"},
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{name: "VMULPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMULPS", commutative: true, typ: "Vec128"},
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{name: "VSCALEFPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec128"},
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{name: "VORPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VORPS", commutative: true, typ: "Vec128"},
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{name: "VSQRTPSMasked128", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec128"},
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{name: "VXORPSMasked128", argLength: 3, reg: fp2m1fp1, asm: "VXORPS", commutative: true, typ: "Vec128"},
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{name: "VMAXPS128", argLength: 2, reg: fp2fp1, asm: "VMAXPS", commutative: true, typ: "Vec128"},
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{name: "VMINPS128", argLength: 2, reg: fp2fp1, asm: "VMINPS", commutative: true, typ: "Vec128"},
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{name: "VMULPS128", argLength: 2, reg: fp2fp1, asm: "VMULPS", commutative: true, typ: "Vec128"},
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{name: "VSCALEFPS128", argLength: 2, reg: fp2fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec128"},
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{name: "VORPS128", argLength: 2, reg: fp2fp1, asm: "VORPS", commutative: true, typ: "Vec128"},
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{name: "VHADDPS128", argLength: 2, reg: fp2fp1, asm: "VHADDPS", commutative: false, typ: "Vec128"},
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{name: "VHSUBPS128", argLength: 2, reg: fp2fp1, asm: "VHSUBPS", commutative: false, typ: "Vec128"},
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{name: "VSQRTPS128", argLength: 1, reg: fp1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec128"},
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{name: "VADDPS128", argLength: 2, reg: fp2fp1, asm: "VADDPS", commutative: false, typ: "Vec128"},
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{name: "VXORPS128", argLength: 2, reg: fp2fp1, asm: "VXORPS", commutative: true, typ: "Vec128"},
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{name: "VADDPS256", argLength: 2, reg: fp2fp1, asm: "VADDPS", commutative: true, typ: "Vec256"},
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{name: "VANDPS256", argLength: 2, reg: fp2fp1, asm: "VANDPS", commutative: true, typ: "Vec256"},
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{name: "VANDNPS256", argLength: 2, reg: fp2fp1, asm: "VANDNPS", commutative: true, typ: "Vec256"},
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{name: "VRCP14PS256", argLength: 1, reg: fp1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec256"},
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{name: "VRSQRTPS256", argLength: 1, reg: fp1fp1, asm: "VRSQRTPS", commutative: false, typ: "Vec256"},
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{name: "VDIVPS256", argLength: 2, reg: fp2fp1, asm: "VDIVPS", commutative: false, typ: "Vec256"},
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{name: "VANDPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VANDPS", commutative: true, typ: "Vec256"},
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{name: "VANDNPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VANDNPS", commutative: true, typ: "Vec256"},
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{name: "VRCP14PSMasked256", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PS", commutative: false, typ: "Vec256"},
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{name: "VRSQRT14PSMasked256", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PS", commutative: false, typ: "Vec256"},
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{name: "VDIVPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VDIVPS", commutative: false, typ: "Vec256"},
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{name: "VMAXPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMAXPS", commutative: true, typ: "Vec256"},
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{name: "VMINPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMINPS", commutative: true, typ: "Vec256"},
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{name: "VMULPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMULPS", commutative: true, typ: "Vec256"},
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{name: "VSCALEFPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec256"},
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{name: "VORPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VORPS", commutative: true, typ: "Vec256"},
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{name: "VSQRTPSMasked256", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec256"},
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{name: "VADDPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VADDPS", commutative: false, typ: "Vec256"},
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{name: "VXORPSMasked256", argLength: 3, reg: fp2m1fp1, asm: "VXORPS", commutative: true, typ: "Vec256"},
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{name: "VMAXPS256", argLength: 2, reg: fp2fp1, asm: "VMAXPS", commutative: true, typ: "Vec256"},
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{name: "VMINPS256", argLength: 2, reg: fp2fp1, asm: "VMINPS", commutative: true, typ: "Vec256"},
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{name: "VMULPS256", argLength: 2, reg: fp2fp1, asm: "VMULPS", commutative: true, typ: "Vec256"},
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{name: "VSCALEFPS256", argLength: 2, reg: fp2fp1, asm: "VSCALEFPS", commutative: false, typ: "Vec256"},
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{name: "VORPS256", argLength: 2, reg: fp2fp1, asm: "VORPS", commutative: true, typ: "Vec256"},
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{name: "VHADDPS256", argLength: 2, reg: fp2fp1, asm: "VHADDPS", commutative: false, typ: "Vec256"},
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{name: "VHSUBPS256", argLength: 2, reg: fp2fp1, asm: "VHSUBPS", commutative: false, typ: "Vec256"},
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{name: "VSQRTPS256", argLength: 1, reg: fp1fp1, asm: "VSQRTPS", commutative: false, typ: "Vec256"},
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{name: "VXORPS256", argLength: 2, reg: fp2fp1, asm: "VXORPS", commutative: true, typ: "Vec256"},
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{name: "VADDPD128", argLength: 2, reg: fp2fp1, asm: "VADDPD", commutative: true, typ: "Vec128"},
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{name: "VANDPD128", argLength: 2, reg: fp2fp1, asm: "VANDPD", commutative: true, typ: "Vec128"},
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{name: "VANDNPD128", argLength: 2, reg: fp2fp1, asm: "VANDNPD", commutative: true, typ: "Vec128"},
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{name: "VRCP14PD128", argLength: 1, reg: fp1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec128"},
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{name: "VRSQRT14PD128", argLength: 1, reg: fp1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec128"},
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{name: "VDIVPD128", argLength: 2, reg: fp2fp1, asm: "VDIVPD", commutative: false, typ: "Vec128"},
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{name: "VADDPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VADDPD", commutative: true, typ: "Vec128"},
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{name: "VANDPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VANDPD", commutative: true, typ: "Vec128"},
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{name: "VANDNPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VANDNPD", commutative: true, typ: "Vec128"},
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{name: "VRCP14PDMasked128", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec128"},
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{name: "VRSQRT14PDMasked128", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec128"},
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{name: "VDIVPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VDIVPD", commutative: false, typ: "Vec128"},
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{name: "VMAXPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMAXPD", commutative: true, typ: "Vec128"},
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{name: "VMINPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMINPD", commutative: true, typ: "Vec128"},
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{name: "VMULPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VMULPD", commutative: true, typ: "Vec128"},
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{name: "VSCALEFPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec128"},
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{name: "VORPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VORPD", commutative: true, typ: "Vec128"},
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{name: "VSQRTPDMasked128", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec128"},
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{name: "VXORPDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VXORPD", commutative: true, typ: "Vec128"},
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{name: "VMAXPD128", argLength: 2, reg: fp2fp1, asm: "VMAXPD", commutative: true, typ: "Vec128"},
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{name: "VMINPD128", argLength: 2, reg: fp2fp1, asm: "VMINPD", commutative: true, typ: "Vec128"},
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{name: "VMULPD128", argLength: 2, reg: fp2fp1, asm: "VMULPD", commutative: true, typ: "Vec128"},
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{name: "VSCALEFPD128", argLength: 2, reg: fp2fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec128"},
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{name: "VORPD128", argLength: 2, reg: fp2fp1, asm: "VORPD", commutative: true, typ: "Vec128"},
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{name: "VHADDPD128", argLength: 2, reg: fp2fp1, asm: "VHADDPD", commutative: false, typ: "Vec128"},
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{name: "VHSUBPD128", argLength: 2, reg: fp2fp1, asm: "VHSUBPD", commutative: false, typ: "Vec128"},
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{name: "VSQRTPD128", argLength: 1, reg: fp1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec128"},
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{name: "VXORPD128", argLength: 2, reg: fp2fp1, asm: "VXORPD", commutative: true, typ: "Vec128"},
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{name: "VADDPD256", argLength: 2, reg: fp2fp1, asm: "VADDPD", commutative: true, typ: "Vec256"},
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{name: "VANDPD256", argLength: 2, reg: fp2fp1, asm: "VANDPD", commutative: true, typ: "Vec256"},
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{name: "VANDNPD256", argLength: 2, reg: fp2fp1, asm: "VANDNPD", commutative: true, typ: "Vec256"},
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{name: "VRCP14PD256", argLength: 1, reg: fp1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec256"},
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{name: "VRSQRT14PD256", argLength: 1, reg: fp1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec256"},
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{name: "VDIVPD256", argLength: 2, reg: fp2fp1, asm: "VDIVPD", commutative: false, typ: "Vec256"},
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{name: "VANDPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VANDPD", commutative: true, typ: "Vec256"},
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{name: "VANDNPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VANDNPD", commutative: true, typ: "Vec256"},
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{name: "VRCP14PDMasked256", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec256"},
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{name: "VRSQRT14PDMasked256", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec256"},
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{name: "VDIVPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VDIVPD", commutative: false, typ: "Vec256"},
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{name: "VMAXPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMAXPD", commutative: true, typ: "Vec256"},
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{name: "VMINPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMINPD", commutative: true, typ: "Vec256"},
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{name: "VMULPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VMULPD", commutative: true, typ: "Vec256"},
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{name: "VSCALEFPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec256"},
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{name: "VORPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VORPD", commutative: true, typ: "Vec256"},
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{name: "VSQRTPDMasked256", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec256"},
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{name: "VADDPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VADDPD", commutative: false, typ: "Vec256"},
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{name: "VXORPDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VXORPD", commutative: true, typ: "Vec256"},
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{name: "VMAXPD256", argLength: 2, reg: fp2fp1, asm: "VMAXPD", commutative: true, typ: "Vec256"},
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{name: "VMINPD256", argLength: 2, reg: fp2fp1, asm: "VMINPD", commutative: true, typ: "Vec256"},
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{name: "VMULPD256", argLength: 2, reg: fp2fp1, asm: "VMULPD", commutative: true, typ: "Vec256"},
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{name: "VSCALEFPD256", argLength: 2, reg: fp2fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec256"},
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{name: "VORPD256", argLength: 2, reg: fp2fp1, asm: "VORPD", commutative: true, typ: "Vec256"},
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{name: "VHADDPD256", argLength: 2, reg: fp2fp1, asm: "VHADDPD", commutative: false, typ: "Vec256"},
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{name: "VHSUBPD256", argLength: 2, reg: fp2fp1, asm: "VHSUBPD", commutative: false, typ: "Vec256"},
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{name: "VSQRTPD256", argLength: 1, reg: fp1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec256"},
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{name: "VXORPD256", argLength: 2, reg: fp2fp1, asm: "VXORPD", commutative: true, typ: "Vec256"},
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{name: "VANDPD512", argLength: 2, reg: fp2fp1, asm: "VANDPD", commutative: true, typ: "Vec512"},
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{name: "VANDNPD512", argLength: 2, reg: fp2fp1, asm: "VANDNPD", commutative: true, typ: "Vec512"},
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{name: "VRCP14PD512", argLength: 1, reg: fp1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec512"},
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{name: "VRSQRT14PD512", argLength: 1, reg: fp1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec512"},
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{name: "VDIVPD512", argLength: 2, reg: fp2fp1, asm: "VDIVPD", commutative: false, typ: "Vec512"},
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{name: "VANDPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VANDPD", commutative: true, typ: "Vec512"},
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{name: "VANDNPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VANDNPD", commutative: true, typ: "Vec512"},
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{name: "VRCP14PDMasked512", argLength: 2, reg: fp1m1fp1, asm: "VRCP14PD", commutative: false, typ: "Vec512"},
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{name: "VRSQRT14PDMasked512", argLength: 2, reg: fp1m1fp1, asm: "VRSQRT14PD", commutative: false, typ: "Vec512"},
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{name: "VDIVPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VDIVPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VMAXPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMAXPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VMINPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMINPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VMULPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VMULPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VSCALEFPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VORPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VORPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VSQRTPDMasked512", argLength: 2, reg: fp1m1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VADDPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VADDPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VXORPDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VXORPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VMAXPD512", argLength: 2, reg: fp2fp1, asm: "VMAXPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VMINPD512", argLength: 2, reg: fp2fp1, asm: "VMINPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VMULPD512", argLength: 2, reg: fp2fp1, asm: "VMULPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VSCALEFPD512", argLength: 2, reg: fp2fp1, asm: "VSCALEFPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VORPD512", argLength: 2, reg: fp2fp1, asm: "VORPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VSQRTPD512", argLength: 1, reg: fp1fp1, asm: "VSQRTPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VADDPD512", argLength: 2, reg: fp2fp1, asm: "VADDPD", commutative: false, typ: "Vec512"},
|
||||
{name: "VXORPD512", argLength: 2, reg: fp2fp1, asm: "VXORPD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPABSW256", argLength: 1, reg: fp1fp1, asm: "VPABSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDW256", argLength: 2, reg: fp2fp1, asm: "VPADDW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQW256", argLength: 2, reg: fp2fp1, asm: "VPCMPEQW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPGTW256", argLength: 2, reg: fp2fp1, asm: "VPCMPGTW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSWMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPABSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQWMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQW", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTWMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTW", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULHWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULHW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULLW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDSWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPSUBSWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSW256", argLength: 2, reg: fp2fp1, asm: "VPMAXSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSW256", argLength: 2, reg: fp2fp1, asm: "VPMINSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULHW256", argLength: 2, reg: fp2fp1, asm: "VPMULHW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLW256", argLength: 2, reg: fp2fp1, asm: "VPMULLW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPHSUBW256", argLength: 2, reg: fp2fp1, asm: "VPHSUBW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPHADDSW256", argLength: 2, reg: fp2fp1, asm: "VPHADDSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPHSUBSW256", argLength: 2, reg: fp2fp1, asm: "VPHSUBSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBSW256", argLength: 2, reg: fp2fp1, asm: "VPSUBSW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSIGNW256", argLength: 2, reg: fp2fp1, asm: "VPSIGNW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBW256", argLength: 2, reg: fp2fp1, asm: "VPSUBW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSW512", argLength: 1, reg: fp1fp1, asm: "VPABSW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPADDW512", argLength: 2, reg: fp2fp1, asm: "VPADDW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPCMPEQW512", argLength: 2, reg: fp2m1, asm: "VPCMPEQW", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTW512", argLength: 2, reg: fp2m1, asm: "VPCMPGTW", commutative: false, typ: "Mask"},
|
||||
{name: "VPABSWMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPABSW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPCMPEQWMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQW", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTWMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTW", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULHWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULHW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULLW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXSW512", argLength: 2, reg: fp2fp1, asm: "VPMAXSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSW512", argLength: 2, reg: fp2fp1, asm: "VPMINSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULHW512", argLength: 2, reg: fp2fp1, asm: "VPMULHW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLW512", argLength: 2, reg: fp2fp1, asm: "VPMULLW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPSUBSW512", argLength: 2, reg: fp2fp1, asm: "VPSUBSW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPABSW128", argLength: 1, reg: fp1fp1, asm: "VPABSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDW128", argLength: 2, reg: fp2fp1, asm: "VPADDW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPEQW128", argLength: 2, reg: fp2fp1, asm: "VPCMPEQW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPGTW128", argLength: 2, reg: fp2fp1, asm: "VPCMPGTW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSWMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPABSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPCMPEQWMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQW", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTWMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTW", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULHWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULHW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULLW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTWMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBSWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPMAXSW128", argLength: 2, reg: fp2fp1, asm: "VPMAXSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSW128", argLength: 2, reg: fp2fp1, asm: "VPMINSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULHW128", argLength: 2, reg: fp2fp1, asm: "VPMULHW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLW128", argLength: 2, reg: fp2fp1, asm: "VPMULLW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPHSUBW128", argLength: 2, reg: fp2fp1, asm: "VPHSUBW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPHADDSW128", argLength: 2, reg: fp2fp1, asm: "VPHADDSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPHSUBSW128", argLength: 2, reg: fp2fp1, asm: "VPHSUBSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSIGNW128", argLength: 2, reg: fp2fp1, asm: "VPSIGNW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSD512", argLength: 1, reg: fp1fp1, asm: "VPABSD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPANDD512", argLength: 2, reg: fp2fp1, asm: "VPANDD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPABSDMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPABSD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPMAXSDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINSD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULLD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTDMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPXORDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPXORD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXSD512", argLength: 2, reg: fp2fp1, asm: "VPMAXSD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSD512", argLength: 2, reg: fp2fp1, asm: "VPMINSD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLD512", argLength: 2, reg: fp2fp1, asm: "VPMULLD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPORD512", argLength: 2, reg: fp2fp1, asm: "VPORD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPXORD512", argLength: 2, reg: fp2fp1, asm: "VPXORD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPABSD128", argLength: 1, reg: fp1fp1, asm: "VPABSD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPCMPEQD128", argLength: 2, reg: fp2fp1, asm: "VPCMPEQD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPGTD128", argLength: 2, reg: fp2fp1, asm: "VPCMPGTD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSDMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPABSD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPANDDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPANDD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXSDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINSD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULLD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPORDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPORD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTDMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPXORDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPXORD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXSD128", argLength: 2, reg: fp2fp1, asm: "VPMAXSD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSD128", argLength: 2, reg: fp2fp1, asm: "VPMINSD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLD128", argLength: 2, reg: fp2fp1, asm: "VPMULLD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPHSUBD128", argLength: 2, reg: fp2fp1, asm: "VPHSUBD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSIGND128", argLength: 2, reg: fp2fp1, asm: "VPSIGND", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBD128", argLength: 2, reg: fp2fp1, asm: "VPSUBD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSD256", argLength: 1, reg: fp1fp1, asm: "VPABSD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPAND256", argLength: 2, reg: fp2fp1, asm: "VPAND", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQD256", argLength: 2, reg: fp2fp1, asm: "VPCMPEQD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPGTD256", argLength: 2, reg: fp2fp1, asm: "VPCMPGTD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSDMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPABSD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINSD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULLD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPORDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPORD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPSUBDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSD256", argLength: 2, reg: fp2fp1, asm: "VPMAXSD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSD256", argLength: 2, reg: fp2fp1, asm: "VPMINSD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLD256", argLength: 2, reg: fp2fp1, asm: "VPMULLD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPHSUBD256", argLength: 2, reg: fp2fp1, asm: "VPHSUBD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPOPCNTD256", argLength: 1, reg: fp1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSIGND256", argLength: 2, reg: fp2fp1, asm: "VPSIGND", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBD256", argLength: 2, reg: fp2fp1, asm: "VPSUBD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSQ128", argLength: 1, reg: fp1fp1, asm: "VPABSQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPCMPEQQ128", argLength: 2, reg: fp2fp1, asm: "VPCMPEQQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPGTQ128", argLength: 2, reg: fp2m1, asm: "VPCMPGTQ", commutative: false, typ: "Mask"},
|
||||
{name: "VPABSQMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPABSQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPANDQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPANDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPANDNQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPEQQMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQQ", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTQMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTQ", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINSQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULDQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULLQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPMAXSQ128", argLength: 2, reg: fp2fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSQ128", argLength: 2, reg: fp2fp1, asm: "VPMINSQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULDQ128", argLength: 2, reg: fp2fp1, asm: "VPMULDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULLQ128", argLength: 2, reg: fp2fp1, asm: "VPMULLQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOR128", argLength: 2, reg: fp2fp1, asm: "VPOR", commutative: true, typ: "Vec128"},
|
||||
{name: "VPABSQ256", argLength: 1, reg: fp1fp1, asm: "VPABSQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDQ256", argLength: 2, reg: fp2fp1, asm: "VPADDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQQ256", argLength: 2, reg: fp2fp1, asm: "VPCMPEQQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPGTQ256", argLength: 2, reg: fp2fp1, asm: "VPCMPGTQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSQMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPABSQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPANDQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPANDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPANDNQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQQMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQQ", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTQMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTQ", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINSQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULDQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULLQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPORQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPORQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTQMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSQ256", argLength: 2, reg: fp2fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSQ256", argLength: 2, reg: fp2fp1, asm: "VPMINSQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULDQ256", argLength: 2, reg: fp2fp1, asm: "VPMULDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULLQ256", argLength: 2, reg: fp2fp1, asm: "VPMULLQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOR256", argLength: 2, reg: fp2fp1, asm: "VPOR", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTQ256", argLength: 1, reg: fp1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBQ256", argLength: 2, reg: fp2fp1, asm: "VPSUBQ", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSQ512", argLength: 1, reg: fp1fp1, asm: "VPABSQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPANDQ512", argLength: 2, reg: fp2fp1, asm: "VPANDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPCMPEQQ512", argLength: 2, reg: fp2m1, asm: "VPCMPEQQ", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTQ512", argLength: 2, reg: fp2m1, asm: "VPCMPGTQ", commutative: false, typ: "Mask"},
|
||||
{name: "VPABSQMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPABSQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPADDQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDNQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPANDNQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPCMPEQQMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPEQQ", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPGTQMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPGTQ", commutative: false, typ: "Mask"},
|
||||
{name: "VPMAXSQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINSQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULDQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULLQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXSQ512", argLength: 2, reg: fp2fp1, asm: "VPMAXSQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSQ512", argLength: 2, reg: fp2fp1, asm: "VPMINSQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULDQ512", argLength: 2, reg: fp2fp1, asm: "VPMULDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULLQ512", argLength: 2, reg: fp2fp1, asm: "VPMULLQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTQ512", argLength: 1, reg: fp1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBQ512", argLength: 2, reg: fp2fp1, asm: "VPSUBQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPXORQ512", argLength: 2, reg: fp2fp1, asm: "VPXORQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPABSB128", argLength: 1, reg: fp1fp1, asm: "VPABSB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDB128", argLength: 2, reg: fp2fp1, asm: "VPADDB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPAND128", argLength: 2, reg: fp2fp1, asm: "VPAND", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPEQB128", argLength: 2, reg: fp2fp1, asm: "VPCMPEQB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPCMPGTB128", argLength: 2, reg: fp2fp1, asm: "VPCMPGTB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSBMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPABSB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXSBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBSBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPMAXSB128", argLength: 2, reg: fp2fp1, asm: "VPMAXSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINSB128", argLength: 2, reg: fp2fp1, asm: "VPMINSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSIGNB128", argLength: 2, reg: fp2fp1, asm: "VPSIGNB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBB128", argLength: 2, reg: fp2fp1, asm: "VPSUBB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPABSB256", argLength: 1, reg: fp1fp1, asm: "VPABSB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDB256", argLength: 2, reg: fp2fp1, asm: "VPADDB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPANDN256", argLength: 2, reg: fp2fp1, asm: "VPANDN", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPEQB256", argLength: 2, reg: fp2fp1, asm: "VPCMPEQB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPCMPGTB256", argLength: 2, reg: fp2fp1, asm: "VPCMPGTB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSBMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPABSB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPSUBSBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXSB256", argLength: 2, reg: fp2fp1, asm: "VPMAXSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINSB256", argLength: 2, reg: fp2fp1, asm: "VPMINSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTB256", argLength: 1, reg: fp1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSIGNB256", argLength: 2, reg: fp2fp1, asm: "VPSIGNB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPABSB512", argLength: 1, reg: fp1fp1, asm: "VPABSB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPABSBMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPABSB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPMAXSBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPADDSBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXSB512", argLength: 2, reg: fp2fp1, asm: "VPMAXSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINSB512", argLength: 2, reg: fp2fp1, asm: "VPMINSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTB512", argLength: 1, reg: fp1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBSB512", argLength: 2, reg: fp2fp1, asm: "VPSUBSB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBB512", argLength: 2, reg: fp2fp1, asm: "VPSUBB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPAVGW256", argLength: 2, reg: fp2fp1, asm: "VPAVGW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPAVGWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPAVGW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULHUWMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULHUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTWMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXUW256", argLength: 2, reg: fp2fp1, asm: "VPMAXUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUW256", argLength: 2, reg: fp2fp1, asm: "VPMINUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULHUW256", argLength: 2, reg: fp2fp1, asm: "VPMULHUW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPHADDW256", argLength: 2, reg: fp2fp1, asm: "VPHADDW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPOPCNTW256", argLength: 1, reg: fp1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDSW256", argLength: 2, reg: fp2fp1, asm: "VPADDSW", commutative: true, typ: "Vec256"},
|
||||
{name: "VPAVGW512", argLength: 2, reg: fp2fp1, asm: "VPAVGW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPADDWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPAVGWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPAVGW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULHUWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULHUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTWMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPADDSWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPSUBSWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBWMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPMAXUW512", argLength: 2, reg: fp2fp1, asm: "VPMAXUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUW512", argLength: 2, reg: fp2fp1, asm: "VPMINUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULHUW512", argLength: 2, reg: fp2fp1, asm: "VPMULHUW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTW512", argLength: 1, reg: fp1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPADDSW512", argLength: 2, reg: fp2fp1, asm: "VPADDSW", commutative: true, typ: "Vec512"},
|
||||
{name: "VPSUBW512", argLength: 2, reg: fp2fp1, asm: "VPSUBW", commutative: false, typ: "Vec512"},
|
||||
{name: "VPAVGW128", argLength: 2, reg: fp2fp1, asm: "VPAVGW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPADDWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPAVGWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPAVGW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULHUWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULHUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPADDSWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBWMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPMAXUW128", argLength: 2, reg: fp2fp1, asm: "VPMAXUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUW128", argLength: 2, reg: fp2fp1, asm: "VPMINUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULHUW128", argLength: 2, reg: fp2fp1, asm: "VPMULHUW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPHADDW128", argLength: 2, reg: fp2fp1, asm: "VPHADDW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPOPCNTW128", argLength: 1, reg: fp1fp1, asm: "VPOPCNTW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDSW128", argLength: 2, reg: fp2fp1, asm: "VPADDSW", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBSW128", argLength: 2, reg: fp2fp1, asm: "VPSUBSW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBW128", argLength: 2, reg: fp2fp1, asm: "VPSUBW", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDD512", argLength: 2, reg: fp2fp1, asm: "VPADDD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDND512", argLength: 2, reg: fp2fp1, asm: "VPANDND", commutative: true, typ: "Vec512"},
|
||||
{name: "VPADDDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPANDD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDNDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPANDND", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINUD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPORDMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPORD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUD512", argLength: 2, reg: fp2fp1, asm: "VPMAXUD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUD512", argLength: 2, reg: fp2fp1, asm: "VPMINUD", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTD512", argLength: 1, reg: fp1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBD512", argLength: 2, reg: fp2fp1, asm: "VPSUBD", commutative: false, typ: "Vec512"},
|
||||
{name: "VPADDD128", argLength: 2, reg: fp2fp1, asm: "VPADDD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPADDDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPANDNDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPANDND", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUDMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINUD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUD128", argLength: 2, reg: fp2fp1, asm: "VPMAXUD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUD128", argLength: 2, reg: fp2fp1, asm: "VPMINUD", commutative: true, typ: "Vec128"},
|
||||
{name: "VPHADDD128", argLength: 2, reg: fp2fp1, asm: "VPHADDD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPOPCNTD128", argLength: 1, reg: fp1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDD256", argLength: 2, reg: fp2fp1, asm: "VPADDD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPANDDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPANDD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPANDNDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPANDND", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINUD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTDMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPXORDMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPXORD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUD256", argLength: 2, reg: fp2fp1, asm: "VPMAXUD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUD256", argLength: 2, reg: fp2fp1, asm: "VPMINUD", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULUDQ256", argLength: 2, reg: fp2fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPHADDD256", argLength: 2, reg: fp2fp1, asm: "VPHADDD", commutative: false, typ: "Vec256"},
|
||||
{name: "VPXOR256", argLength: 2, reg: fp2fp1, asm: "VPXOR", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDQ128", argLength: 2, reg: fp2fp1, asm: "VPADDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPADDQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINUQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULUDQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPORQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPORQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTQMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPXORQMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPXORQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUQ128", argLength: 2, reg: fp2fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUQ128", argLength: 2, reg: fp2fp1, asm: "VPMINUQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMULUDQ128", argLength: 2, reg: fp2fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTQ128", argLength: 1, reg: fp1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPSUBQ128", argLength: 2, reg: fp2fp1, asm: "VPSUBQ", commutative: false, typ: "Vec128"},
|
||||
{name: "VPXOR128", argLength: 2, reg: fp2fp1, asm: "VPXOR", commutative: true, typ: "Vec128"},
|
||||
{name: "VPADDQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINUQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMULUDQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPXORQMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPXORQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUQ256", argLength: 2, reg: fp2fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUQ256", argLength: 2, reg: fp2fp1, asm: "VPMINUQ", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDQ512", argLength: 2, reg: fp2fp1, asm: "VPADDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDNQ512", argLength: 2, reg: fp2fp1, asm: "VPANDNQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPANDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINUQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULUDQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPORQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPORQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTQMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBQ", commutative: false, typ: "Vec512"},
|
||||
{name: "VPXORQMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPXORQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUQ512", argLength: 2, reg: fp2fp1, asm: "VPMAXUQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUQ512", argLength: 2, reg: fp2fp1, asm: "VPMINUQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMULUDQ512", argLength: 2, reg: fp2fp1, asm: "VPMULUDQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPORQ512", argLength: 2, reg: fp2fp1, asm: "VPORQ", commutative: true, typ: "Vec512"},
|
||||
{name: "VPANDN128", argLength: 2, reg: fp2fp1, asm: "VPANDN", commutative: true, typ: "Vec128"},
|
||||
{name: "VPAVGB128", argLength: 2, reg: fp2fp1, asm: "VPAVGB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPAVGBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPAVGB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMAXUBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPMINUB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTBMasked128", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDSBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPADDSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBBMasked128", argLength: 3, reg: fp2m1fp1, asm: "VPSUBB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPMAXUB128", argLength: 2, reg: fp2fp1, asm: "VPMAXUB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPMINUB128", argLength: 2, reg: fp2fp1, asm: "VPMINUB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPOPCNTB128", argLength: 1, reg: fp1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPADDSB128", argLength: 2, reg: fp2fp1, asm: "VPADDSB", commutative: true, typ: "Vec128"},
|
||||
{name: "VPSUBSB128", argLength: 2, reg: fp2fp1, asm: "VPSUBSB", commutative: false, typ: "Vec128"},
|
||||
{name: "VPAVGB256", argLength: 2, reg: fp2fp1, asm: "VPAVGB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPAVGBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPAVGB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMAXUBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPMINUB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPOPCNTBMasked256", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDSBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPADDSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPSUBBMasked256", argLength: 3, reg: fp2m1fp1, asm: "VPSUBB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPMAXUB256", argLength: 2, reg: fp2fp1, asm: "VPMAXUB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPMINUB256", argLength: 2, reg: fp2fp1, asm: "VPMINUB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPADDSB256", argLength: 2, reg: fp2fp1, asm: "VPADDSB", commutative: true, typ: "Vec256"},
|
||||
{name: "VPSUBSB256", argLength: 2, reg: fp2fp1, asm: "VPSUBSB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPSUBB256", argLength: 2, reg: fp2fp1, asm: "VPSUBB", commutative: false, typ: "Vec256"},
|
||||
{name: "VPADDB512", argLength: 2, reg: fp2fp1, asm: "VPADDB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPAVGB512", argLength: 2, reg: fp2fp1, asm: "VPAVGB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPADDBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPADDB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPAVGBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPAVGB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMAXUBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMAXUB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPMINUB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPOPCNTBMasked512", argLength: 2, reg: fp1m1fp1, asm: "VPOPCNTB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBSBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBSB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPSUBBMasked512", argLength: 3, reg: fp2m1fp1, asm: "VPSUBB", commutative: false, typ: "Vec512"},
|
||||
{name: "VPMAXUB512", argLength: 2, reg: fp2fp1, asm: "VPMAXUB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPMINUB512", argLength: 2, reg: fp2fp1, asm: "VPMINUB", commutative: true, typ: "Vec512"},
|
||||
{name: "VPADDSB512", argLength: 2, reg: fp2fp1, asm: "VPADDSB", commutative: true, typ: "Vec512"},
|
||||
{name: "VCMPPS512", argLength: 2, reg: fp2m1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VCMPPSMasked512", argLength: 3, reg: fp2m1m1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VCMPPS128", argLength: 2, reg: fp2fp1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Vec128"},
|
||||
{name: "VCMPPSMasked128", argLength: 3, reg: fp2m1m1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VCMPPS256", argLength: 2, reg: fp2fp1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Vec256"},
|
||||
{name: "VCMPPSMasked256", argLength: 3, reg: fp2m1m1, asm: "VCMPPS", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VCMPPD128", argLength: 2, reg: fp2fp1, asm: "VCMPPD", aux: "Int8", commutative: false, typ: "Vec128"},
|
||||
{name: "VCMPPDMasked128", argLength: 3, reg: fp2m1m1, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VCMPPD256", argLength: 2, reg: fp2fp1, asm: "VCMPPD", aux: "Int8", commutative: false, typ: "Vec256"},
|
||||
{name: "VCMPPDMasked256", argLength: 3, reg: fp2m1m1, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VCMPPD512", argLength: 2, reg: fp2m1, asm: "VCMPPD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VCMPPDMasked512", argLength: 3, reg: fp2m1m1, asm: "VCMPPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPW256", argLength: 2, reg: fp2m1, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPWMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPWMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPW512", argLength: 2, reg: fp2m1, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPW128", argLength: 2, reg: fp2m1, asm: "VPCMPW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPWMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPW", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPD512", argLength: 2, reg: fp2m1, asm: "VPCMPD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPDMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPDMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPD128", argLength: 2, reg: fp2m1, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPD256", argLength: 2, reg: fp2m1, asm: "VPCMPD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPDMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPQ128", argLength: 2, reg: fp2m1, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPQMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPQ256", argLength: 2, reg: fp2m1, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPQMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPQMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPQ512", argLength: 2, reg: fp2m1, asm: "VPCMPQ", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPBMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPB128", argLength: 2, reg: fp2m1, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPBMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPB256", argLength: 2, reg: fp2m1, asm: "VPCMPB", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPB512", argLength: 2, reg: fp2m1, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPBMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUW256", argLength: 2, reg: fp2m1, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUWMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUW512", argLength: 2, reg: fp2m1, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPUWMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUW128", argLength: 2, reg: fp2m1, asm: "VPCMPUW", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUWMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPUW", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPUDMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUD512", argLength: 2, reg: fp2m1, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPUD128", argLength: 2, reg: fp2m1, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUDMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUDMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPUD", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUD256", argLength: 2, reg: fp2m1, asm: "VPCMPUD", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPUQ128", argLength: 2, reg: fp2m1, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUQMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUQMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUQ256", argLength: 2, reg: fp2m1, asm: "VPCMPUQ", aux: "Int8", commutative: true, typ: "Mask"},
|
||||
{name: "VPCMPUQ512", argLength: 2, reg: fp2m1, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUQMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPUQ", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUB128", argLength: 2, reg: fp2m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUBMasked128", argLength: 3, reg: fp2m1m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUB256", argLength: 2, reg: fp2m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUBMasked256", argLength: 3, reg: fp2m1m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUB512", argLength: 2, reg: fp2m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
{name: "VPCMPUBMasked512", argLength: 3, reg: fp2m1m1, asm: "VPCMPUB", aux: "Int8", commutative: false, typ: "Mask"},
|
||||
}
|
||||
}
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,165 @@
|
|||
// Copyright 2025 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
//go:build goexperiment.simd
|
||||
|
||||
package simd_test
|
||||
|
||||
import (
|
||||
"simd"
|
||||
"testing"
|
||||
)
|
||||
|
||||
func TestType(t *testing.T) {
|
||||
// Testing:
|
||||
// - Defined as another struct's field is safe
|
||||
// - Pointer is safe.
|
||||
// - typedef is safe
|
||||
// - type alias is safe
|
||||
// - type conversion is safe
|
||||
type alias = simd.Int32x4
|
||||
type maskT simd.Mask32x4
|
||||
type myStruct struct {
|
||||
x alias
|
||||
y *simd.Int32x4
|
||||
z maskT
|
||||
}
|
||||
vals := [4]int32{1, 2, 3, 4}
|
||||
v := myStruct{x: simd.LoadInt32x4(&vals)}
|
||||
// masking elements 1 and 2.
|
||||
maskv := [4]int32{-1, -1, 0, 0}
|
||||
want := []int32{2, 4, 0, 0}
|
||||
y := simd.LoadInt32x4(&vals)
|
||||
v.y = &y
|
||||
|
||||
if !simd.HasAVX512BW() || !simd.HasAVX512VL() {
|
||||
t.Skip("Test requires HasAVX512BW+VL, not available on this hardware")
|
||||
return
|
||||
}
|
||||
v.z = maskT(simd.LoadInt32x4(&maskv).AsMask32x4())
|
||||
*v.y = v.y.MaskedAdd(v.x, simd.Mask32x4(v.z))
|
||||
|
||||
got := [4]int32{}
|
||||
v.y.Store(&got)
|
||||
for i := range 4 {
|
||||
if want[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, want[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestAdd(t *testing.T) {
|
||||
xv := [4]int32{1, 2, 3, 4}
|
||||
yv := [4]int32{5, 6, 7, 8}
|
||||
want := []int32{6, 8, 10, 12}
|
||||
x := simd.LoadInt32x4(&xv)
|
||||
y := simd.LoadInt32x4(&yv)
|
||||
x = x.Add(y)
|
||||
got := [4]int32{}
|
||||
x.Store(&got)
|
||||
for i := range 4 {
|
||||
if want[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, want[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestVectorConversion(t *testing.T) {
|
||||
if !simd.HasAVX512BW() || !simd.HasAVX512VL() {
|
||||
t.Skip("Test requires HasAVX512BW+VL, not available on this hardware")
|
||||
return
|
||||
}
|
||||
xv := [4]int32{1, 2, 3, 4}
|
||||
x := simd.LoadInt32x4(&xv)
|
||||
xPromoted := x.AsInt64x2()
|
||||
xPromotedDemoted := xPromoted.AsInt32x4()
|
||||
got := [4]int32{}
|
||||
xPromotedDemoted.Store(&got)
|
||||
for i := range 4 {
|
||||
if xv[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, xv[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestMaskConversion(t *testing.T) {
|
||||
if !simd.HasAVX512BW() || !simd.HasAVX512VL() {
|
||||
t.Skip("Test requires HasAVX512BW+VL, not available on this hardware")
|
||||
return
|
||||
}
|
||||
v := [4]int32{1, 0, 1, 0}
|
||||
x := simd.LoadInt32x4(&v)
|
||||
var y simd.Int32x4
|
||||
mask := y.Sub(x).AsMask32x4()
|
||||
v = [4]int32{5, 6, 7, 8}
|
||||
y = simd.LoadInt32x4(&v)
|
||||
y = y.MaskedAdd(x, mask)
|
||||
got := [4]int32{6, 0, 8, 0}
|
||||
y.Store(&v)
|
||||
for i := range 4 {
|
||||
if v[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, v[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestMaskedAdd(t *testing.T) {
|
||||
if !simd.HasAVX512BW() || !simd.HasAVX512VL() {
|
||||
t.Skip("Test requires HasAVX512BW+VL, not available on this hardware")
|
||||
return
|
||||
}
|
||||
xv := [4]int32{1, 2, 3, 4}
|
||||
yv := [4]int32{5, 6, 7, 8}
|
||||
// masking elements 1 and 2.
|
||||
maskv := [4]int32{-1, -1, 0, 0}
|
||||
want := []int32{6, 8, 0, 0}
|
||||
x := simd.LoadInt32x4(&xv)
|
||||
y := simd.LoadInt32x4(&yv)
|
||||
mask := simd.LoadInt32x4(&maskv).AsMask32x4()
|
||||
x = x.MaskedAdd(y, mask)
|
||||
got := [4]int32{}
|
||||
x.Store(&got)
|
||||
for i := range 4 {
|
||||
if want[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, want[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestCompare(t *testing.T) {
|
||||
xv := [4]int32{5, 1, 5, 3}
|
||||
yv := [4]int32{3, 3, 3, 3}
|
||||
want := []int32{8, 0, 8, 0}
|
||||
x := simd.LoadInt32x4(&xv)
|
||||
y := simd.LoadInt32x4(&yv)
|
||||
if !simd.HasAVX512BW() {
|
||||
t.Skip("Test requires HasAVX512BW, not available on this hardware")
|
||||
return
|
||||
}
|
||||
mask := x.Greater(y)
|
||||
x = x.MaskedAdd(y, mask)
|
||||
got := [4]int32{}
|
||||
x.Store(&got)
|
||||
for i := range 4 {
|
||||
if want[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, want[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func TestSub(t *testing.T) {
|
||||
xv := [4]int32{5, 5, 5, 3}
|
||||
yv := [4]int32{3, 3, 3, 3}
|
||||
want := []int32{2, 2, 2, 0}
|
||||
x := simd.LoadInt32x4(&xv)
|
||||
y := simd.LoadInt32x4(&yv)
|
||||
x = x.Sub(y)
|
||||
got := [4]int32{}
|
||||
x.Store(&got)
|
||||
for i := range 4 {
|
||||
if want[i] != got[i] {
|
||||
t.Errorf("Result at %d incorrect: want %d, got %d", i, want[i], got[i])
|
||||
}
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,662 @@
|
|||
// Code generated by x/arch/internal/simdgen using 'go run . -xedPath $XED_PATH -o godefs -goroot $GOROOT go.yaml types.yaml categories.yaml'; DO NOT EDIT.
|
||||
|
||||
//go:build goexperiment.simd
|
||||
|
||||
package simd
|
||||
|
||||
// v128 is a tag type that tells the compiler that this is really 128-bit SIMD
|
||||
type v128 struct {
|
||||
_128 struct{}
|
||||
}
|
||||
|
||||
// Int32x4 is a 128-bit SIMD vector of 4 int32
|
||||
type Int32x4 struct {
|
||||
int32x4 v128
|
||||
vals [4]int32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int32x4
|
||||
func (x Int32x4) Len() int { return 4 }
|
||||
|
||||
// LoadInt32x4 loads a Int32x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt32x4(y *[4]int32) Int32x4
|
||||
|
||||
// Store stores a Int32x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int32x4) Store(y *[4]int32)
|
||||
|
||||
// Mask32x4 is a 128-bit SIMD vector of 4 int32
|
||||
type Mask32x4 struct {
|
||||
int32x4 v128
|
||||
vals [4]int32
|
||||
}
|
||||
|
||||
// Int8x16 is a 128-bit SIMD vector of 16 int8
|
||||
type Int8x16 struct {
|
||||
int8x16 v128
|
||||
vals [16]int8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int8x16
|
||||
func (x Int8x16) Len() int { return 16 }
|
||||
|
||||
// LoadInt8x16 loads a Int8x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt8x16(y *[16]int8) Int8x16
|
||||
|
||||
// Store stores a Int8x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int8x16) Store(y *[16]int8)
|
||||
|
||||
// Mask8x16 is a 128-bit SIMD vector of 16 int8
|
||||
type Mask8x16 struct {
|
||||
int8x16 v128
|
||||
vals [16]int8
|
||||
}
|
||||
|
||||
// Uint16x8 is a 128-bit SIMD vector of 8 uint16
|
||||
type Uint16x8 struct {
|
||||
uint16x8 v128
|
||||
vals [8]uint16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint16x8
|
||||
func (x Uint16x8) Len() int { return 8 }
|
||||
|
||||
// LoadUint16x8 loads a Uint16x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint16x8(y *[8]uint16) Uint16x8
|
||||
|
||||
// Store stores a Uint16x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint16x8) Store(y *[8]uint16)
|
||||
|
||||
// Mask16x8 is a 128-bit SIMD vector of 8 int16
|
||||
type Mask16x8 struct {
|
||||
int16x8 v128
|
||||
vals [8]int16
|
||||
}
|
||||
|
||||
// Int16x8 is a 128-bit SIMD vector of 8 int16
|
||||
type Int16x8 struct {
|
||||
int16x8 v128
|
||||
vals [8]int16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int16x8
|
||||
func (x Int16x8) Len() int { return 8 }
|
||||
|
||||
// LoadInt16x8 loads a Int16x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt16x8(y *[8]int16) Int16x8
|
||||
|
||||
// Store stores a Int16x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int16x8) Store(y *[8]int16)
|
||||
|
||||
// Float32x4 is a 128-bit SIMD vector of 4 float32
|
||||
type Float32x4 struct {
|
||||
float32x4 v128
|
||||
vals [4]float32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float32x4
|
||||
func (x Float32x4) Len() int { return 4 }
|
||||
|
||||
// LoadFloat32x4 loads a Float32x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat32x4(y *[4]float32) Float32x4
|
||||
|
||||
// Store stores a Float32x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float32x4) Store(y *[4]float32)
|
||||
|
||||
// Uint64x2 is a 128-bit SIMD vector of 2 uint64
|
||||
type Uint64x2 struct {
|
||||
uint64x2 v128
|
||||
vals [2]uint64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint64x2
|
||||
func (x Uint64x2) Len() int { return 2 }
|
||||
|
||||
// LoadUint64x2 loads a Uint64x2 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint64x2(y *[2]uint64) Uint64x2
|
||||
|
||||
// Store stores a Uint64x2 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint64x2) Store(y *[2]uint64)
|
||||
|
||||
// Float64x2 is a 128-bit SIMD vector of 2 float64
|
||||
type Float64x2 struct {
|
||||
float64x2 v128
|
||||
vals [2]float64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float64x2
|
||||
func (x Float64x2) Len() int { return 2 }
|
||||
|
||||
// LoadFloat64x2 loads a Float64x2 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat64x2(y *[2]float64) Float64x2
|
||||
|
||||
// Store stores a Float64x2 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float64x2) Store(y *[2]float64)
|
||||
|
||||
// Mask64x2 is a 128-bit SIMD vector of 2 int64
|
||||
type Mask64x2 struct {
|
||||
int64x2 v128
|
||||
vals [2]int64
|
||||
}
|
||||
|
||||
// Int64x2 is a 128-bit SIMD vector of 2 int64
|
||||
type Int64x2 struct {
|
||||
int64x2 v128
|
||||
vals [2]int64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int64x2
|
||||
func (x Int64x2) Len() int { return 2 }
|
||||
|
||||
// LoadInt64x2 loads a Int64x2 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt64x2(y *[2]int64) Int64x2
|
||||
|
||||
// Store stores a Int64x2 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int64x2) Store(y *[2]int64)
|
||||
|
||||
// Uint8x16 is a 128-bit SIMD vector of 16 uint8
|
||||
type Uint8x16 struct {
|
||||
uint8x16 v128
|
||||
vals [16]uint8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint8x16
|
||||
func (x Uint8x16) Len() int { return 16 }
|
||||
|
||||
// LoadUint8x16 loads a Uint8x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint8x16(y *[16]uint8) Uint8x16
|
||||
|
||||
// Store stores a Uint8x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint8x16) Store(y *[16]uint8)
|
||||
|
||||
// Uint32x4 is a 128-bit SIMD vector of 4 uint32
|
||||
type Uint32x4 struct {
|
||||
uint32x4 v128
|
||||
vals [4]uint32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint32x4
|
||||
func (x Uint32x4) Len() int { return 4 }
|
||||
|
||||
// LoadUint32x4 loads a Uint32x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint32x4(y *[4]uint32) Uint32x4
|
||||
|
||||
// Store stores a Uint32x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint32x4) Store(y *[4]uint32)
|
||||
|
||||
// v256 is a tag type that tells the compiler that this is really 256-bit SIMD
|
||||
type v256 struct {
|
||||
_256 struct{}
|
||||
}
|
||||
|
||||
// Int16x16 is a 256-bit SIMD vector of 16 int16
|
||||
type Int16x16 struct {
|
||||
int16x16 v256
|
||||
vals [16]int16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int16x16
|
||||
func (x Int16x16) Len() int { return 16 }
|
||||
|
||||
// LoadInt16x16 loads a Int16x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt16x16(y *[16]int16) Int16x16
|
||||
|
||||
// Store stores a Int16x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int16x16) Store(y *[16]int16)
|
||||
|
||||
// Int32x8 is a 256-bit SIMD vector of 8 int32
|
||||
type Int32x8 struct {
|
||||
int32x8 v256
|
||||
vals [8]int32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int32x8
|
||||
func (x Int32x8) Len() int { return 8 }
|
||||
|
||||
// LoadInt32x8 loads a Int32x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt32x8(y *[8]int32) Int32x8
|
||||
|
||||
// Store stores a Int32x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int32x8) Store(y *[8]int32)
|
||||
|
||||
// Uint64x4 is a 256-bit SIMD vector of 4 uint64
|
||||
type Uint64x4 struct {
|
||||
uint64x4 v256
|
||||
vals [4]uint64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint64x4
|
||||
func (x Uint64x4) Len() int { return 4 }
|
||||
|
||||
// LoadUint64x4 loads a Uint64x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint64x4(y *[4]uint64) Uint64x4
|
||||
|
||||
// Store stores a Uint64x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint64x4) Store(y *[4]uint64)
|
||||
|
||||
// Mask64x4 is a 256-bit SIMD vector of 4 int64
|
||||
type Mask64x4 struct {
|
||||
int64x4 v256
|
||||
vals [4]int64
|
||||
}
|
||||
|
||||
// Int64x4 is a 256-bit SIMD vector of 4 int64
|
||||
type Int64x4 struct {
|
||||
int64x4 v256
|
||||
vals [4]int64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int64x4
|
||||
func (x Int64x4) Len() int { return 4 }
|
||||
|
||||
// LoadInt64x4 loads a Int64x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt64x4(y *[4]int64) Int64x4
|
||||
|
||||
// Store stores a Int64x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int64x4) Store(y *[4]int64)
|
||||
|
||||
// Float64x4 is a 256-bit SIMD vector of 4 float64
|
||||
type Float64x4 struct {
|
||||
float64x4 v256
|
||||
vals [4]float64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float64x4
|
||||
func (x Float64x4) Len() int { return 4 }
|
||||
|
||||
// LoadFloat64x4 loads a Float64x4 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat64x4(y *[4]float64) Float64x4
|
||||
|
||||
// Store stores a Float64x4 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float64x4) Store(y *[4]float64)
|
||||
|
||||
// Mask16x16 is a 256-bit SIMD vector of 16 int16
|
||||
type Mask16x16 struct {
|
||||
int16x16 v256
|
||||
vals [16]int16
|
||||
}
|
||||
|
||||
// Mask32x8 is a 256-bit SIMD vector of 8 int32
|
||||
type Mask32x8 struct {
|
||||
int32x8 v256
|
||||
vals [8]int32
|
||||
}
|
||||
|
||||
// Float32x8 is a 256-bit SIMD vector of 8 float32
|
||||
type Float32x8 struct {
|
||||
float32x8 v256
|
||||
vals [8]float32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float32x8
|
||||
func (x Float32x8) Len() int { return 8 }
|
||||
|
||||
// LoadFloat32x8 loads a Float32x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat32x8(y *[8]float32) Float32x8
|
||||
|
||||
// Store stores a Float32x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float32x8) Store(y *[8]float32)
|
||||
|
||||
// Uint16x16 is a 256-bit SIMD vector of 16 uint16
|
||||
type Uint16x16 struct {
|
||||
uint16x16 v256
|
||||
vals [16]uint16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint16x16
|
||||
func (x Uint16x16) Len() int { return 16 }
|
||||
|
||||
// LoadUint16x16 loads a Uint16x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint16x16(y *[16]uint16) Uint16x16
|
||||
|
||||
// Store stores a Uint16x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint16x16) Store(y *[16]uint16)
|
||||
|
||||
// Int8x32 is a 256-bit SIMD vector of 32 int8
|
||||
type Int8x32 struct {
|
||||
int8x32 v256
|
||||
vals [32]int8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int8x32
|
||||
func (x Int8x32) Len() int { return 32 }
|
||||
|
||||
// LoadInt8x32 loads a Int8x32 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt8x32(y *[32]int8) Int8x32
|
||||
|
||||
// Store stores a Int8x32 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int8x32) Store(y *[32]int8)
|
||||
|
||||
// Uint8x32 is a 256-bit SIMD vector of 32 uint8
|
||||
type Uint8x32 struct {
|
||||
uint8x32 v256
|
||||
vals [32]uint8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint8x32
|
||||
func (x Uint8x32) Len() int { return 32 }
|
||||
|
||||
// LoadUint8x32 loads a Uint8x32 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint8x32(y *[32]uint8) Uint8x32
|
||||
|
||||
// Store stores a Uint8x32 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint8x32) Store(y *[32]uint8)
|
||||
|
||||
// Mask8x32 is a 256-bit SIMD vector of 32 int8
|
||||
type Mask8x32 struct {
|
||||
int8x32 v256
|
||||
vals [32]int8
|
||||
}
|
||||
|
||||
// Uint32x8 is a 256-bit SIMD vector of 8 uint32
|
||||
type Uint32x8 struct {
|
||||
uint32x8 v256
|
||||
vals [8]uint32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint32x8
|
||||
func (x Uint32x8) Len() int { return 8 }
|
||||
|
||||
// LoadUint32x8 loads a Uint32x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint32x8(y *[8]uint32) Uint32x8
|
||||
|
||||
// Store stores a Uint32x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint32x8) Store(y *[8]uint32)
|
||||
|
||||
// v512 is a tag type that tells the compiler that this is really 512-bit SIMD
|
||||
type v512 struct {
|
||||
_512 struct{}
|
||||
}
|
||||
|
||||
// Float64x8 is a 512-bit SIMD vector of 8 float64
|
||||
type Float64x8 struct {
|
||||
float64x8 v512
|
||||
vals [8]float64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float64x8
|
||||
func (x Float64x8) Len() int { return 8 }
|
||||
|
||||
// LoadFloat64x8 loads a Float64x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat64x8(y *[8]float64) Float64x8
|
||||
|
||||
// Store stores a Float64x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float64x8) Store(y *[8]float64)
|
||||
|
||||
// Mask64x8 is a 512-bit SIMD vector of 8 int64
|
||||
type Mask64x8 struct {
|
||||
int64x8 v512
|
||||
vals [8]int64
|
||||
}
|
||||
|
||||
// Int64x8 is a 512-bit SIMD vector of 8 int64
|
||||
type Int64x8 struct {
|
||||
int64x8 v512
|
||||
vals [8]int64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int64x8
|
||||
func (x Int64x8) Len() int { return 8 }
|
||||
|
||||
// LoadInt64x8 loads a Int64x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt64x8(y *[8]int64) Int64x8
|
||||
|
||||
// Store stores a Int64x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int64x8) Store(y *[8]int64)
|
||||
|
||||
// Uint8x64 is a 512-bit SIMD vector of 64 uint8
|
||||
type Uint8x64 struct {
|
||||
uint8x64 v512
|
||||
vals [64]uint8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint8x64
|
||||
func (x Uint8x64) Len() int { return 64 }
|
||||
|
||||
// LoadUint8x64 loads a Uint8x64 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint8x64(y *[64]uint8) Uint8x64
|
||||
|
||||
// Store stores a Uint8x64 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint8x64) Store(y *[64]uint8)
|
||||
|
||||
// Mask8x64 is a 512-bit SIMD vector of 64 int8
|
||||
type Mask8x64 struct {
|
||||
int8x64 v512
|
||||
vals [64]int8
|
||||
}
|
||||
|
||||
// Int8x64 is a 512-bit SIMD vector of 64 int8
|
||||
type Int8x64 struct {
|
||||
int8x64 v512
|
||||
vals [64]int8
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int8x64
|
||||
func (x Int8x64) Len() int { return 64 }
|
||||
|
||||
// LoadInt8x64 loads a Int8x64 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt8x64(y *[64]int8) Int8x64
|
||||
|
||||
// Store stores a Int8x64 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int8x64) Store(y *[64]int8)
|
||||
|
||||
// Float32x16 is a 512-bit SIMD vector of 16 float32
|
||||
type Float32x16 struct {
|
||||
float32x16 v512
|
||||
vals [16]float32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Float32x16
|
||||
func (x Float32x16) Len() int { return 16 }
|
||||
|
||||
// LoadFloat32x16 loads a Float32x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadFloat32x16(y *[16]float32) Float32x16
|
||||
|
||||
// Store stores a Float32x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Float32x16) Store(y *[16]float32)
|
||||
|
||||
// Mask32x16 is a 512-bit SIMD vector of 16 int32
|
||||
type Mask32x16 struct {
|
||||
int32x16 v512
|
||||
vals [16]int32
|
||||
}
|
||||
|
||||
// Int32x16 is a 512-bit SIMD vector of 16 int32
|
||||
type Int32x16 struct {
|
||||
int32x16 v512
|
||||
vals [16]int32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int32x16
|
||||
func (x Int32x16) Len() int { return 16 }
|
||||
|
||||
// LoadInt32x16 loads a Int32x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt32x16(y *[16]int32) Int32x16
|
||||
|
||||
// Store stores a Int32x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int32x16) Store(y *[16]int32)
|
||||
|
||||
// Uint16x32 is a 512-bit SIMD vector of 32 uint16
|
||||
type Uint16x32 struct {
|
||||
uint16x32 v512
|
||||
vals [32]uint16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint16x32
|
||||
func (x Uint16x32) Len() int { return 32 }
|
||||
|
||||
// LoadUint16x32 loads a Uint16x32 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint16x32(y *[32]uint16) Uint16x32
|
||||
|
||||
// Store stores a Uint16x32 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint16x32) Store(y *[32]uint16)
|
||||
|
||||
// Mask16x32 is a 512-bit SIMD vector of 32 int16
|
||||
type Mask16x32 struct {
|
||||
int16x32 v512
|
||||
vals [32]int16
|
||||
}
|
||||
|
||||
// Int16x32 is a 512-bit SIMD vector of 32 int16
|
||||
type Int16x32 struct {
|
||||
int16x32 v512
|
||||
vals [32]int16
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Int16x32
|
||||
func (x Int16x32) Len() int { return 32 }
|
||||
|
||||
// LoadInt16x32 loads a Int16x32 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadInt16x32(y *[32]int16) Int16x32
|
||||
|
||||
// Store stores a Int16x32 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Int16x32) Store(y *[32]int16)
|
||||
|
||||
// Uint64x8 is a 512-bit SIMD vector of 8 uint64
|
||||
type Uint64x8 struct {
|
||||
uint64x8 v512
|
||||
vals [8]uint64
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint64x8
|
||||
func (x Uint64x8) Len() int { return 8 }
|
||||
|
||||
// LoadUint64x8 loads a Uint64x8 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint64x8(y *[8]uint64) Uint64x8
|
||||
|
||||
// Store stores a Uint64x8 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint64x8) Store(y *[8]uint64)
|
||||
|
||||
// Uint32x16 is a 512-bit SIMD vector of 16 uint32
|
||||
type Uint32x16 struct {
|
||||
uint32x16 v512
|
||||
vals [16]uint32
|
||||
}
|
||||
|
||||
// Len returns the number of elements in a Uint32x16
|
||||
func (x Uint32x16) Len() int { return 16 }
|
||||
|
||||
// LoadUint32x16 loads a Uint32x16 from an array
|
||||
//
|
||||
//go:noescape
|
||||
func LoadUint32x16(y *[16]uint32) Uint32x16
|
||||
|
||||
// Store stores a Uint32x16 to an array
|
||||
//
|
||||
//go:noescape
|
||||
func (x Uint32x16) Store(y *[16]uint32)
|
||||
Loading…
Reference in New Issue