mirror of https://github.com/golang/go.git
cmd/compile: switch to typed aux for mips lowering rules
This covers most of the lowering rules. Passes GOARCH=mips gotip build -toolexec 'toolstash -cmp' -a std GOARCH=mipsle gotip build -toolexec 'toolstash -cmp' -a std Change-Id: I9d00aaebecb36622e3bdaf556e5a9377670bf86b Reviewed-on: https://go-review.googlesource.com/c/go/+/229102 Reviewed-by: Keith Randall <khr@golang.org>
This commit is contained in:
Alberto Donizetti
parent
141b11d5a1
commit
81df5e69fc
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@ -2,266 +2,266 @@
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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(Add(Ptr|32|16|8) ...) -> (ADD ...)
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(Add(32|64)F ...) -> (ADD(F|D) ...)
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(Add(Ptr|32|16|8) ...) => (ADD ...)
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(Add(32|64)F ...) => (ADD(F|D) ...)
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(Select0 (Add32carry <t> x y)) -> (ADD <t.FieldType(0)> x y)
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(Select1 (Add32carry <t> x y)) -> (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
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(Add32withcarry <t> x y c) -> (ADD c (ADD <t> x y))
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(Select0 (Add32carry <t> x y)) => (ADD <t.FieldType(0)> x y)
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(Select1 (Add32carry <t> x y)) => (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
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(Add32withcarry <t> x y c) => (ADD c (ADD <t> x y))
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(Sub(Ptr|32|16|8) ...) -> (SUB ...)
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(Sub(32|64)F ...) -> (SUB(F|D) ...)
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(Sub(Ptr|32|16|8) ...) => (SUB ...)
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(Sub(32|64)F ...) => (SUB(F|D) ...)
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(Select0 (Sub32carry <t> x y)) -> (SUB <t.FieldType(0)> x y)
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(Select1 (Sub32carry <t> x y)) -> (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
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(Sub32withcarry <t> x y c) -> (SUB (SUB <t> x y) c)
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(Select0 (Sub32carry <t> x y)) => (SUB <t.FieldType(0)> x y)
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(Select1 (Sub32carry <t> x y)) => (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
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(Sub32withcarry <t> x y c) => (SUB (SUB <t> x y) c)
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(Mul(32|16|8) ...) -> (MUL ...)
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(Mul(32|64)F ...) -> (MUL(F|D) ...)
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(Mul(32|16|8) ...) => (MUL ...)
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(Mul(32|64)F ...) => (MUL(F|D) ...)
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(Hmul(32|32u) x y) -> (Select0 (MUL(T|TU) x y))
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(Mul32uhilo ...) -> (MULTU ...)
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(Hmul(32|32u) x y) => (Select0 (MUL(T|TU) x y))
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(Mul32uhilo ...) => (MULTU ...)
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(Div32 x y) -> (Select1 (DIV x y))
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(Div32u x y) -> (Select1 (DIVU x y))
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(Div16 x y) -> (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
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(Div16u x y) -> (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Div8 x y) -> (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
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(Div8u x y) -> (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
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(Div(32|64)F ...) -> (DIV(F|D) ...)
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(Div32 x y) => (Select1 (DIV x y))
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(Div32u x y) => (Select1 (DIVU x y))
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(Div16 x y) => (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
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(Div16u x y) => (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Div8 x y) => (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
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(Div8u x y) => (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
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(Div(32|64)F ...) => (DIV(F|D) ...)
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(Mod32 x y) -> (Select0 (DIV x y))
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(Mod32u x y) -> (Select0 (DIVU x y))
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(Mod16 x y) -> (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
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(Mod16u x y) -> (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Mod8 x y) -> (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
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(Mod8u x y) -> (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
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(Mod32 x y) => (Select0 (DIV x y))
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(Mod32u x y) => (Select0 (DIVU x y))
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(Mod16 x y) => (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
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(Mod16u x y) => (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
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(Mod8 x y) => (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
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(Mod8u x y) => (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
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// (x + y) / 2 with x>=y -> (x - y) / 2 + y
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(Avg32u <t> x y) -> (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
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// (x + y) / 2 with x>=y becomes (x - y) / 2 + y
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(Avg32u <t> x y) => (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
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(And(32|16|8) ...) -> (AND ...)
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(Or(32|16|8) ...) -> (OR ...)
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(Xor(32|16|8) ...) -> (XOR ...)
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(And(32|16|8) ...) => (AND ...)
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(Or(32|16|8) ...) => (OR ...)
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(Xor(32|16|8) ...) => (XOR ...)
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// constant shifts
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// generic opt rewrites all constant shifts to shift by Const64
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(Lsh32x64 x (Const64 [c])) && uint32(c) < 32 -> (SLLconst x [c])
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(Rsh32x64 x (Const64 [c])) && uint32(c) < 32 -> (SRAconst x [c])
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(Rsh32Ux64 x (Const64 [c])) && uint32(c) < 32 -> (SRLconst x [c])
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(Lsh16x64 x (Const64 [c])) && uint32(c) < 16 -> (SLLconst x [c])
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(Rsh16x64 x (Const64 [c])) && uint32(c) < 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [c+16])
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(Rsh16Ux64 x (Const64 [c])) && uint32(c) < 16 -> (SRLconst (SLLconst <typ.UInt32> x [16]) [c+16])
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(Lsh8x64 x (Const64 [c])) && uint32(c) < 8 -> (SLLconst x [c])
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(Rsh8x64 x (Const64 [c])) && uint32(c) < 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [c+24])
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(Rsh8Ux64 x (Const64 [c])) && uint32(c) < 8 -> (SRLconst (SLLconst <typ.UInt32> x [24]) [c+24])
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(Lsh32x64 x (Const64 [c])) && uint32(c) < 32 => (SLLconst x [int32(c)])
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(Rsh32x64 x (Const64 [c])) && uint32(c) < 32 => (SRAconst x [int32(c)])
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(Rsh32Ux64 x (Const64 [c])) && uint32(c) < 32 => (SRLconst x [int32(c)])
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(Lsh16x64 x (Const64 [c])) && uint32(c) < 16 => (SLLconst x [int32(c)])
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(Rsh16x64 x (Const64 [c])) && uint32(c) < 16 => (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
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(Rsh16Ux64 x (Const64 [c])) && uint32(c) < 16 => (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
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(Lsh8x64 x (Const64 [c])) && uint32(c) < 8 => (SLLconst x [int32(c)])
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(Rsh8x64 x (Const64 [c])) && uint32(c) < 8 => (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
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(Rsh8Ux64 x (Const64 [c])) && uint32(c) < 8 => (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
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// large constant shifts
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(Lsh32x64 _ (Const64 [c])) && uint32(c) >= 32 -> (MOVWconst [0])
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(Rsh32Ux64 _ (Const64 [c])) && uint32(c) >= 32 -> (MOVWconst [0])
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(Lsh16x64 _ (Const64 [c])) && uint32(c) >= 16 -> (MOVWconst [0])
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(Rsh16Ux64 _ (Const64 [c])) && uint32(c) >= 16 -> (MOVWconst [0])
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(Lsh8x64 _ (Const64 [c])) && uint32(c) >= 8 -> (MOVWconst [0])
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(Rsh8Ux64 _ (Const64 [c])) && uint32(c) >= 8 -> (MOVWconst [0])
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(Lsh32x64 _ (Const64 [c])) && uint32(c) >= 32 => (MOVWconst [0])
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(Rsh32Ux64 _ (Const64 [c])) && uint32(c) >= 32 => (MOVWconst [0])
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(Lsh16x64 _ (Const64 [c])) && uint32(c) >= 16 => (MOVWconst [0])
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(Rsh16Ux64 _ (Const64 [c])) && uint32(c) >= 16 => (MOVWconst [0])
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(Lsh8x64 _ (Const64 [c])) && uint32(c) >= 8 => (MOVWconst [0])
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(Rsh8Ux64 _ (Const64 [c])) && uint32(c) >= 8 => (MOVWconst [0])
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// large constant signed right shift, we leave the sign bit
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(Rsh32x64 x (Const64 [c])) && uint32(c) >= 32 -> (SRAconst x [31])
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(Rsh16x64 x (Const64 [c])) && uint32(c) >= 16 -> (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
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(Rsh8x64 x (Const64 [c])) && uint32(c) >= 8 -> (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
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(Rsh32x64 x (Const64 [c])) && uint32(c) >= 32 => (SRAconst x [31])
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(Rsh16x64 x (Const64 [c])) && uint32(c) >= 16 => (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
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(Rsh8x64 x (Const64 [c])) && uint32(c) >= 8 => (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
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// shifts
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// hardware instruction uses only the low 5 bits of the shift
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// we compare to 32 to ensure Go semantics for large shifts
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(Lsh32x32 <t> x y) -> (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh32x16 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh32x8 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Lsh32x32 <t> x y) => (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh32x16 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh32x8 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Lsh16x32 <t> x y) -> (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh16x16 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh16x8 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Lsh16x32 <t> x y) => (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh16x16 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh16x8 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Lsh8x32 <t> x y) -> (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh8x16 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh8x8 <t> x y) -> (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Lsh8x32 <t> x y) => (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Lsh8x16 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Lsh8x8 <t> x y) => (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh32Ux32 <t> x y) -> (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh32Ux16 <t> x y) -> (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh32Ux8 <t> x y) -> (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh32Ux32 <t> x y) => (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh32Ux16 <t> x y) => (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh32Ux8 <t> x y) => (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh16Ux32 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh16Ux16 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh16Ux8 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh16Ux32 <t> x y) => (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh16Ux16 <t> x y) => (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh16Ux8 <t> x y) => (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh8Ux32 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh8Ux16 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh8Ux8 <t> x y) -> (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh8Ux32 <t> x y) => (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
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(Rsh8Ux16 <t> x y) => (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
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(Rsh8Ux8 <t> x y) => (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
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(Rsh32x32 x y) -> (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh32x16 x y) -> (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh32x8 x y) -> (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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(Rsh32x32 x y) => (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh32x16 x y) => (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh32x8 x y) => (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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(Rsh16x32 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh16x16 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh16x8 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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(Rsh16x32 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh16x16 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh16x8 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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(Rsh8x32 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh8x16 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh8x8 x y) -> (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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(Rsh8x32 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [-1]) (SGTUconst [32] y)))
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(Rsh8x16 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt16to32 y))))
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(Rsh8x8 x y) => (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [-1]) (SGTUconst [32] (ZeroExt8to32 y))))
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// rotates
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(RotateLeft8 <t> x (MOVWconst [c])) -> (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
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(RotateLeft16 <t> x (MOVWconst [c])) -> (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
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(RotateLeft32 <t> x (MOVWconst [c])) -> (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
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(RotateLeft64 <t> x (MOVWconst [c])) -> (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
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(RotateLeft8 <t> x (MOVWconst [c])) => (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
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(RotateLeft16 <t> x (MOVWconst [c])) => (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
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(RotateLeft32 <t> x (MOVWconst [c])) => (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
|
||||
(RotateLeft64 <t> x (MOVWconst [c])) => (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
|
||||
|
||||
// unary ops
|
||||
(Neg(32|16|8) ...) -> (NEG ...)
|
||||
(Neg(32|64)F ...) -> (NEG(F|D) ...)
|
||||
(Neg(32|16|8) ...) => (NEG ...)
|
||||
(Neg(32|64)F ...) => (NEG(F|D) ...)
|
||||
|
||||
(Com(32|16|8) x) -> (NORconst [0] x)
|
||||
(Com(32|16|8) x) => (NORconst [0] x)
|
||||
|
||||
(Sqrt ...) -> (SQRTD ...)
|
||||
(Sqrt ...) => (SQRTD ...)
|
||||
|
||||
// TODO: optimize this case?
|
||||
(Ctz32NonZero ...) -> (Ctz32 ...)
|
||||
(Ctz32NonZero ...) => (Ctz32 ...)
|
||||
|
||||
// count trailing zero
|
||||
// 32 - CLZ(x&-x - 1)
|
||||
(Ctz32 <t> x) -> (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
|
||||
(Ctz32 <t> x) => (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
|
||||
|
||||
// bit length
|
||||
(BitLen32 <t> x) -> (SUB (MOVWconst [32]) (CLZ <t> x))
|
||||
(BitLen32 <t> x) => (SUB (MOVWconst [32]) (CLZ <t> x))
|
||||
|
||||
// boolean ops -- booleans are represented with 0=false, 1=true
|
||||
(AndB ...) -> (AND ...)
|
||||
(OrB ...) -> (OR ...)
|
||||
(EqB x y) -> (XORconst [1] (XOR <typ.Bool> x y))
|
||||
(NeqB ...) -> (XOR ...)
|
||||
(Not x) -> (XORconst [1] x)
|
||||
(AndB ...) => (AND ...)
|
||||
(OrB ...) => (OR ...)
|
||||
(EqB x y) => (XORconst [1] (XOR <typ.Bool> x y))
|
||||
(NeqB ...) => (XOR ...)
|
||||
(Not x) => (XORconst [1] x)
|
||||
|
||||
// constants
|
||||
(Const(32|16|8) ...) -> (MOVWconst ...)
|
||||
(Const(32|64)F ...) -> (MOV(F|D)const ...)
|
||||
(ConstNil) -> (MOVWconst [0])
|
||||
(ConstBool ...) -> (MOVWconst ...)
|
||||
(Const(32|16|8) [val]) => (MOVWconst [int32(val)])
|
||||
(Const(32|64)F ...) => (MOV(F|D)const ...)
|
||||
(ConstNil) => (MOVWconst [0])
|
||||
(ConstBool [b]) => (MOVWconst [int32(b2i(b))])
|
||||
|
||||
// truncations
|
||||
// Because we ignore high parts of registers, truncates are just copies.
|
||||
(Trunc16to8 ...) -> (Copy ...)
|
||||
(Trunc32to8 ...) -> (Copy ...)
|
||||
(Trunc32to16 ...) -> (Copy ...)
|
||||
(Trunc16to8 ...) => (Copy ...)
|
||||
(Trunc32to8 ...) => (Copy ...)
|
||||
(Trunc32to16 ...) => (Copy ...)
|
||||
|
||||
// Zero-/Sign-extensions
|
||||
(ZeroExt8to16 ...) -> (MOVBUreg ...)
|
||||
(ZeroExt8to32 ...) -> (MOVBUreg ...)
|
||||
(ZeroExt16to32 ...) -> (MOVHUreg ...)
|
||||
(ZeroExt8to16 ...) => (MOVBUreg ...)
|
||||
(ZeroExt8to32 ...) => (MOVBUreg ...)
|
||||
(ZeroExt16to32 ...) => (MOVHUreg ...)
|
||||
|
||||
(SignExt8to16 ...) -> (MOVBreg ...)
|
||||
(SignExt8to32 ...) -> (MOVBreg ...)
|
||||
(SignExt16to32 ...) -> (MOVHreg ...)
|
||||
(SignExt8to16 ...) => (MOVBreg ...)
|
||||
(SignExt8to32 ...) => (MOVBreg ...)
|
||||
(SignExt16to32 ...) => (MOVHreg ...)
|
||||
|
||||
(Signmask x) -> (SRAconst x [31])
|
||||
(Zeromask x) -> (NEG (SGTU x (MOVWconst [0])))
|
||||
(Slicemask <t> x) -> (SRAconst (NEG <t> x) [31])
|
||||
(Signmask x) => (SRAconst x [31])
|
||||
(Zeromask x) => (NEG (SGTU x (MOVWconst [0])))
|
||||
(Slicemask <t> x) => (SRAconst (NEG <t> x) [31])
|
||||
|
||||
// float <-> int conversion
|
||||
(Cvt32to(32|64)F ...) -> (MOVW(F|D) ...)
|
||||
(Cvt(32|64)Fto32 ...) -> (TRUNC(F|D)W ...)
|
||||
(Cvt32Fto64F ...) -> (MOVFD ...)
|
||||
(Cvt64Fto32F ...) -> (MOVDF ...)
|
||||
// float-int conversion
|
||||
(Cvt32to(32|64)F ...) => (MOVW(F|D) ...)
|
||||
(Cvt(32|64)Fto32 ...) => (TRUNC(F|D)W ...)
|
||||
(Cvt32Fto64F ...) => (MOVFD ...)
|
||||
(Cvt64Fto32F ...) => (MOVDF ...)
|
||||
|
||||
(CvtBoolToUint8 ...) -> (Copy ...)
|
||||
(CvtBoolToUint8 ...) => (Copy ...)
|
||||
|
||||
(Round(32|64)F ...) -> (Copy ...)
|
||||
(Round(32|64)F ...) => (Copy ...)
|
||||
|
||||
// comparisons
|
||||
(Eq8 x y) -> (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
|
||||
(Eq16 x y) -> (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
|
||||
(Eq32 x y) -> (SGTUconst [1] (XOR x y))
|
||||
(EqPtr x y) -> (SGTUconst [1] (XOR x y))
|
||||
(Eq(32|64)F x y) -> (FPFlagTrue (CMPEQ(F|D) x y))
|
||||
(Eq8 x y) => (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
|
||||
(Eq16 x y) => (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
|
||||
(Eq32 x y) => (SGTUconst [1] (XOR x y))
|
||||
(EqPtr x y) => (SGTUconst [1] (XOR x y))
|
||||
(Eq(32|64)F x y) => (FPFlagTrue (CMPEQ(F|D) x y))
|
||||
|
||||
(Neq8 x y) -> (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
|
||||
(Neq16 x y) -> (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
|
||||
(Neq32 x y) -> (SGTU (XOR x y) (MOVWconst [0]))
|
||||
(NeqPtr x y) -> (SGTU (XOR x y) (MOVWconst [0]))
|
||||
(Neq(32|64)F x y) -> (FPFlagFalse (CMPEQ(F|D) x y))
|
||||
(Neq8 x y) => (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
|
||||
(Neq16 x y) => (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
|
||||
(Neq32 x y) => (SGTU (XOR x y) (MOVWconst [0]))
|
||||
(NeqPtr x y) => (SGTU (XOR x y) (MOVWconst [0]))
|
||||
(Neq(32|64)F x y) => (FPFlagFalse (CMPEQ(F|D) x y))
|
||||
|
||||
(Less8 x y) -> (SGT (SignExt8to32 y) (SignExt8to32 x))
|
||||
(Less16 x y) -> (SGT (SignExt16to32 y) (SignExt16to32 x))
|
||||
(Less32 x y) -> (SGT y x)
|
||||
(Less(32|64)F x y) -> (FPFlagTrue (CMPGT(F|D) y x)) // reverse operands to work around NaN
|
||||
(Less8 x y) => (SGT (SignExt8to32 y) (SignExt8to32 x))
|
||||
(Less16 x y) => (SGT (SignExt16to32 y) (SignExt16to32 x))
|
||||
(Less32 x y) => (SGT y x)
|
||||
(Less(32|64)F x y) => (FPFlagTrue (CMPGT(F|D) y x)) // reverse operands to work around NaN
|
||||
|
||||
(Less8U x y) -> (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
|
||||
(Less16U x y) -> (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
|
||||
(Less32U x y) -> (SGTU y x)
|
||||
(Less8U x y) => (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
|
||||
(Less16U x y) => (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
|
||||
(Less32U x y) => (SGTU y x)
|
||||
|
||||
(Leq8 x y) -> (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
|
||||
(Leq16 x y) -> (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
|
||||
(Leq32 x y) -> (XORconst [1] (SGT x y))
|
||||
(Leq(32|64)F x y) -> (FPFlagTrue (CMPGE(F|D) y x)) // reverse operands to work around NaN
|
||||
(Leq8 x y) => (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
|
||||
(Leq16 x y) => (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
|
||||
(Leq32 x y) => (XORconst [1] (SGT x y))
|
||||
(Leq(32|64)F x y) => (FPFlagTrue (CMPGE(F|D) y x)) // reverse operands to work around NaN
|
||||
|
||||
(Leq8U x y) -> (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
|
||||
(Leq16U x y) -> (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
|
||||
(Leq32U x y) -> (XORconst [1] (SGTU x y))
|
||||
(Leq8U x y) => (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
|
||||
(Leq16U x y) => (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
|
||||
(Leq32U x y) => (XORconst [1] (SGTU x y))
|
||||
|
||||
(OffPtr [off] ptr:(SP)) -> (MOVWaddr [off] ptr)
|
||||
(OffPtr [off] ptr) -> (ADDconst [off] ptr)
|
||||
(OffPtr [off] ptr:(SP)) => (MOVWaddr [int32(off)] ptr)
|
||||
(OffPtr [off] ptr) => (ADDconst [int32(off)] ptr)
|
||||
|
||||
(Addr ...) -> (MOVWaddr ...)
|
||||
(LocalAddr {sym} base _) -> (MOVWaddr {sym} base)
|
||||
(Addr {sym} base) => (MOVWaddr {sym} base)
|
||||
(LocalAddr {sym} base _) => (MOVWaddr {sym} base)
|
||||
|
||||
// loads
|
||||
(Load <t> ptr mem) && t.IsBoolean() -> (MOVBUload ptr mem)
|
||||
(Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) -> (MOVBload ptr mem)
|
||||
(Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) -> (MOVBUload ptr mem)
|
||||
(Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) -> (MOVHload ptr mem)
|
||||
(Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) -> (MOVHUload ptr mem)
|
||||
(Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) -> (MOVWload ptr mem)
|
||||
(Load <t> ptr mem) && is32BitFloat(t) -> (MOVFload ptr mem)
|
||||
(Load <t> ptr mem) && is64BitFloat(t) -> (MOVDload ptr mem)
|
||||
(Load <t> ptr mem) && t.IsBoolean() => (MOVBUload ptr mem)
|
||||
(Load <t> ptr mem) && (is8BitInt(t) && isSigned(t)) => (MOVBload ptr mem)
|
||||
(Load <t> ptr mem) && (is8BitInt(t) && !isSigned(t)) => (MOVBUload ptr mem)
|
||||
(Load <t> ptr mem) && (is16BitInt(t) && isSigned(t)) => (MOVHload ptr mem)
|
||||
(Load <t> ptr mem) && (is16BitInt(t) && !isSigned(t)) => (MOVHUload ptr mem)
|
||||
(Load <t> ptr mem) && (is32BitInt(t) || isPtr(t)) => (MOVWload ptr mem)
|
||||
(Load <t> ptr mem) && is32BitFloat(t) => (MOVFload ptr mem)
|
||||
(Load <t> ptr mem) && is64BitFloat(t) => (MOVDload ptr mem)
|
||||
|
||||
// stores
|
||||
(Store {t} ptr val mem) && t.(*types.Type).Size() == 1 -> (MOVBstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.(*types.Type).Size() == 2 -> (MOVHstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && !is32BitFloat(val.Type) -> (MOVWstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.(*types.Type).Size() == 4 && is32BitFloat(val.Type) -> (MOVFstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.(*types.Type).Size() == 8 && is64BitFloat(val.Type) -> (MOVDstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.Size() == 1 => (MOVBstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.Size() == 2 => (MOVHstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.Size() == 4 && !is32BitFloat(val.Type) => (MOVWstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.Size() == 4 && is32BitFloat(val.Type) => (MOVFstore ptr val mem)
|
||||
(Store {t} ptr val mem) && t.Size() == 8 && is64BitFloat(val.Type) => (MOVDstore ptr val mem)
|
||||
|
||||
// zero instructions
|
||||
(Zero [0] _ mem) -> mem
|
||||
(Zero [1] ptr mem) -> (MOVBstore ptr (MOVWconst [0]) mem)
|
||||
(Zero [2] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Zero [0] _ mem) => mem
|
||||
(Zero [1] ptr mem) => (MOVBstore ptr (MOVWconst [0]) mem)
|
||||
(Zero [2] {t} ptr mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore ptr (MOVWconst [0]) mem)
|
||||
(Zero [2] ptr mem) ->
|
||||
(Zero [2] ptr mem) =>
|
||||
(MOVBstore [1] ptr (MOVWconst [0])
|
||||
(MOVBstore [0] ptr (MOVWconst [0]) mem))
|
||||
(Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Zero [4] {t} ptr mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore ptr (MOVWconst [0]) mem)
|
||||
(Zero [4] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Zero [4] {t} ptr mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore [2] ptr (MOVWconst [0])
|
||||
(MOVHstore [0] ptr (MOVWconst [0]) mem))
|
||||
(Zero [4] ptr mem) ->
|
||||
(Zero [4] ptr mem) =>
|
||||
(MOVBstore [3] ptr (MOVWconst [0])
|
||||
(MOVBstore [2] ptr (MOVWconst [0])
|
||||
(MOVBstore [1] ptr (MOVWconst [0])
|
||||
(MOVBstore [0] ptr (MOVWconst [0]) mem))))
|
||||
(Zero [3] ptr mem) ->
|
||||
(Zero [3] ptr mem) =>
|
||||
(MOVBstore [2] ptr (MOVWconst [0])
|
||||
(MOVBstore [1] ptr (MOVWconst [0])
|
||||
(MOVBstore [0] ptr (MOVWconst [0]) mem)))
|
||||
(Zero [6] {t} ptr mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Zero [6] {t} ptr mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore [4] ptr (MOVWconst [0])
|
||||
(MOVHstore [2] ptr (MOVWconst [0])
|
||||
(MOVHstore [0] ptr (MOVWconst [0]) mem)))
|
||||
(Zero [8] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Zero [8] {t} ptr mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [4] ptr (MOVWconst [0])
|
||||
(MOVWstore [0] ptr (MOVWconst [0]) mem))
|
||||
(Zero [12] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Zero [12] {t} ptr mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [8] ptr (MOVWconst [0])
|
||||
(MOVWstore [4] ptr (MOVWconst [0])
|
||||
(MOVWstore [0] ptr (MOVWconst [0]) mem)))
|
||||
(Zero [16] {t} ptr mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Zero [16] {t} ptr mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [12] ptr (MOVWconst [0])
|
||||
(MOVWstore [8] ptr (MOVWconst [0])
|
||||
(MOVWstore [4] ptr (MOVWconst [0])
|
||||
|
|
@ -269,51 +269,51 @@
|
|||
|
||||
// large or unaligned zeroing uses a loop
|
||||
(Zero [s] {t} ptr mem)
|
||||
&& (s > 16 || t.(*types.Type).Alignment()%4 != 0) ->
|
||||
(LoweredZero [t.(*types.Type).Alignment()]
|
||||
&& (s > 16 || t.Alignment()%4 != 0) =>
|
||||
(LoweredZero [int32(t.Alignment())]
|
||||
ptr
|
||||
(ADDconst <ptr.Type> ptr [s-moveSize(t.(*types.Type).Alignment(), config)])
|
||||
(ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))])
|
||||
mem)
|
||||
|
||||
// moves
|
||||
(Move [0] _ _ mem) -> mem
|
||||
(Move [1] dst src mem) -> (MOVBstore dst (MOVBUload src mem) mem)
|
||||
(Move [2] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Move [0] _ _ mem) => mem
|
||||
(Move [1] dst src mem) => (MOVBstore dst (MOVBUload src mem) mem)
|
||||
(Move [2] {t} dst src mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore dst (MOVHUload src mem) mem)
|
||||
(Move [2] dst src mem) ->
|
||||
(Move [2] dst src mem) =>
|
||||
(MOVBstore [1] dst (MOVBUload [1] src mem)
|
||||
(MOVBstore dst (MOVBUload src mem) mem))
|
||||
(Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Move [4] {t} dst src mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore dst (MOVWload src mem) mem)
|
||||
(Move [4] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Move [4] {t} dst src mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore [2] dst (MOVHUload [2] src mem)
|
||||
(MOVHstore dst (MOVHUload src mem) mem))
|
||||
(Move [4] dst src mem) ->
|
||||
(Move [4] dst src mem) =>
|
||||
(MOVBstore [3] dst (MOVBUload [3] src mem)
|
||||
(MOVBstore [2] dst (MOVBUload [2] src mem)
|
||||
(MOVBstore [1] dst (MOVBUload [1] src mem)
|
||||
(MOVBstore dst (MOVBUload src mem) mem))))
|
||||
(Move [3] dst src mem) ->
|
||||
(Move [3] dst src mem) =>
|
||||
(MOVBstore [2] dst (MOVBUload [2] src mem)
|
||||
(MOVBstore [1] dst (MOVBUload [1] src mem)
|
||||
(MOVBstore dst (MOVBUload src mem) mem)))
|
||||
(Move [8] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Move [8] {t} dst src mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [4] dst (MOVWload [4] src mem)
|
||||
(MOVWstore dst (MOVWload src mem) mem))
|
||||
(Move [8] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Move [8] {t} dst src mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore [6] dst (MOVHload [6] src mem)
|
||||
(MOVHstore [4] dst (MOVHload [4] src mem)
|
||||
(MOVHstore [2] dst (MOVHload [2] src mem)
|
||||
(MOVHstore dst (MOVHload src mem) mem))))
|
||||
(Move [6] {t} dst src mem) && t.(*types.Type).Alignment()%2 == 0 ->
|
||||
(Move [6] {t} dst src mem) && t.Alignment()%2 == 0 =>
|
||||
(MOVHstore [4] dst (MOVHload [4] src mem)
|
||||
(MOVHstore [2] dst (MOVHload [2] src mem)
|
||||
(MOVHstore dst (MOVHload src mem) mem)))
|
||||
(Move [12] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Move [12] {t} dst src mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [8] dst (MOVWload [8] src mem)
|
||||
(MOVWstore [4] dst (MOVWload [4] src mem)
|
||||
(MOVWstore dst (MOVWload src mem) mem)))
|
||||
(Move [16] {t} dst src mem) && t.(*types.Type).Alignment()%4 == 0 ->
|
||||
(Move [16] {t} dst src mem) && t.Alignment()%4 == 0 =>
|
||||
(MOVWstore [12] dst (MOVWload [12] src mem)
|
||||
(MOVWstore [8] dst (MOVWload [8] src mem)
|
||||
(MOVWstore [4] dst (MOVWload [4] src mem)
|
||||
|
|
@ -322,29 +322,29 @@
|
|||
|
||||
// large or unaligned move uses a loop
|
||||
(Move [s] {t} dst src mem)
|
||||
&& (s > 16 && logLargeCopy(v, s) || t.(*types.Type).Alignment()%4 != 0) ->
|
||||
(LoweredMove [t.(*types.Type).Alignment()]
|
||||
&& (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) =>
|
||||
(LoweredMove [int32(t.Alignment())]
|
||||
dst
|
||||
src
|
||||
(ADDconst <src.Type> src [s-moveSize(t.(*types.Type).Alignment(), config)])
|
||||
(ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))])
|
||||
mem)
|
||||
|
||||
// calls
|
||||
(StaticCall ...) -> (CALLstatic ...)
|
||||
(ClosureCall ...) -> (CALLclosure ...)
|
||||
(InterCall ...) -> (CALLinter ...)
|
||||
(StaticCall ...) => (CALLstatic ...)
|
||||
(ClosureCall ...) => (CALLclosure ...)
|
||||
(InterCall ...) => (CALLinter ...)
|
||||
|
||||
// atomic intrinsics
|
||||
(AtomicLoad(8|32) ...) -> (LoweredAtomicLoad(8|32) ...)
|
||||
(AtomicLoadPtr ...) -> (LoweredAtomicLoad32 ...)
|
||||
(AtomicLoad(8|32) ...) => (LoweredAtomicLoad(8|32) ...)
|
||||
(AtomicLoadPtr ...) => (LoweredAtomicLoad32 ...)
|
||||
|
||||
(AtomicStore(8|32) ...) -> (LoweredAtomicStore(8|32) ...)
|
||||
(AtomicStorePtrNoWB ...) -> (LoweredAtomicStore32 ...)
|
||||
(AtomicStore(8|32) ...) => (LoweredAtomicStore(8|32) ...)
|
||||
(AtomicStorePtrNoWB ...) => (LoweredAtomicStore32 ...)
|
||||
|
||||
(AtomicExchange32 ...) -> (LoweredAtomicExchange ...)
|
||||
(AtomicAdd32 ...) -> (LoweredAtomicAdd ...)
|
||||
(AtomicExchange32 ...) => (LoweredAtomicExchange ...)
|
||||
(AtomicAdd32 ...) => (LoweredAtomicAdd ...)
|
||||
|
||||
(AtomicCompareAndSwap32 ...) -> (LoweredAtomicCas ...)
|
||||
(AtomicCompareAndSwap32 ...) => (LoweredAtomicCas ...)
|
||||
|
||||
// AtomicOr8(ptr,val) -> LoweredAtomicOr(ptr&^3,uint32(val) << ((ptr & 3) * 8))
|
||||
(AtomicOr8 ptr val mem) && !config.BigEndian ->
|
||||
|
|
|
|||
File diff suppressed because it is too large
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Reference in New Issue