mirror of https://github.com/golang/go.git
crypto/md5: provide optimised assembly for riscv64
Provide an optimised assembly implementation of MD5 for RISC-V.
There are significant performance improvements. The assembler takes
advantage of Zbb instructions when they are available.
Results for the VisionFive 2 running Ubuntu 24.04 with
GORISCV64=rva20u64.
goos: linux
goarch: riscv64
pkg: crypto/md5
│ md5_go.txt │ md5_ass.txt │
│ sec/op │ sec/op vs base │
Hash8Bytes 1.202µ ± 0% 1.220µ ± 0% +1.50% (p=0.000 n=10)
Hash64 1.665µ ± 0% 1.518µ ± 0% -8.83% (p=0.000 n=10)
Hash128 2.165µ ± 0% 1.885µ ± 0% -12.94% (p=0.000 n=10)
Hash256 3.162µ ± 0% 2.613µ ± 0% -17.38% (p=0.000 n=10)
Hash512 5.146µ ± 0% 4.063µ ± 0% -21.05% (p=0.000 n=10)
Hash1K 9.115µ ± 0% 6.959µ ± 0% -23.65% (p=0.000 n=10)
Hash8K 64.68µ ± 0% 47.52µ ± 0% -26.54% (p=0.000 n=10)
Hash1M 8.131m ± 0% 5.936m ± 0% -27.00% (p=0.000 n=10)
Hash8M 65.06m ± 0% 47.50m ± 0% -26.99% (p=0.000 n=10)
Hash8BytesUnaligned 1.210µ ± 0% 1.199µ ± 0% -0.91% (p=0.000 n=10)
Hash1KUnaligned 9.114µ ± 0% 8.266µ ± 0% -9.30% (p=0.000 n=10)
Hash8KUnaligned 64.68µ ± 0% 57.97µ ± 0% -10.38% (p=0.000 n=10)
geomean 22.37µ 18.83µ -15.82%
Results for the VisionFive 2 running Ubuntu 24.04 with
GORISCV64=rva22u64.
goos: linux
goarch: riscv64
pkg: crypto/md5
│ md5_g22.txt │ md5_a22.txt │
│ sec/op │ sec/op vs base │
Hash8Bytes 1.175µ ± 0% 1.002µ ± 0% -14.72% (p=0.000 n=10)
Hash64 1.575µ ± 0% 1.274µ ± 0% -19.11% (p=0.000 n=10)
Hash128 2.033µ ± 0% 1.587µ ± 0% -21.92% (p=0.000 n=10)
Hash256 2.943µ ± 0% 2.209µ ± 0% -24.93% (p=0.000 n=10)
Hash512 4.755µ ± 0% 3.443µ ± 0% -27.58% (p=0.000 n=10)
Hash1K 8.378µ ± 0% 5.910µ ± 0% -29.46% (p=0.000 n=10)
Hash8K 59.12µ ± 0% 40.45µ ± 0% -31.58% (p=0.000 n=10)
Hash1M 7.426m ± 0% 5.056m ± 0% -31.92% (p=0.000 n=10)
Hash8M 59.41m ± 0% 40.45m ± 0% -31.91% (p=0.000 n=10)
Hash8BytesUnaligned 1.169µ ± 0% 1.012µ ± 0% -13.43% (p=0.000 n=10)
Hash1KUnaligned 8.379µ ± 0% 7.213µ ± 0% -13.91% (p=0.000 n=10)
Hash8KUnaligned 59.12µ ± 0% 50.90µ ± 0% -13.91% (p=0.000 n=10)
geomean 20.83µ 15.99µ -23.21%
Change-Id: I61e3fa802c2cc50e0b5f71f151b4741691ccb481
Reviewed-on: https://go-review.googlesource.com/c/go/+/527936
Reviewed-by: Joel Sing <joel@sing.id.au>
Auto-Submit: Tim King <taking@google.com>
Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
Reviewed-by: Meng Zhuo <mengzhuo1203@gmail.com>
LUCI-TryBot-Result: Go LUCI <golang-scoped@luci-project-accounts.iam.gserviceaccount.com>
Reviewed-by: Tim King <taking@google.com>
This commit is contained in:
Mark Ryan
Gopher Robot
parent
d79e6bec63
commit
5752a94677
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// license that can be found in the LICENSE file.
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//go:build (386 || amd64 || arm || arm64 || loong64 || ppc64 || ppc64le || s390x) && !purego
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//go:build (386 || amd64 || arm || arm64 || loong64 || ppc64 || ppc64le || riscv64 || s390x) && !purego
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package md5
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package md5
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@ -2,7 +2,7 @@
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// Use of this source code is governed by a BSD-style
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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// license that can be found in the LICENSE file.
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//go:build (!386 && !amd64 && !arm && !arm64 && !loong64 && !ppc64 && !ppc64le && !s390x) || purego
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//go:build (!386 && !amd64 && !arm && !arm64 && !loong64 && !ppc64 && !ppc64le && !riscv64 && !s390x) || purego
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package md5
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package md5
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@ -0,0 +1,279 @@
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// Copyright 2023 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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//
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// RISCV64 version of md5block.go
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// derived from crypto/md5/md5block_arm64.s and crypto/md5/md5block.go
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//go:build !purego
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#include "textflag.h"
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#define LOAD32U(base, offset, tmp, dest) \
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MOVBU (offset+0*1)(base), dest; \
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MOVBU (offset+1*1)(base), tmp; \
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SLL $8, tmp; \
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OR tmp, dest; \
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MOVBU (offset+2*1)(base), tmp; \
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SLL $16, tmp; \
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OR tmp, dest; \
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MOVBU (offset+3*1)(base), tmp; \
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SLL $24, tmp; \
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OR tmp, dest
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#define LOAD64U(base, offset, tmp1, tmp2, dst) \
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LOAD32U(base, offset, tmp1, dst); \
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LOAD32U(base, offset+4, tmp1, tmp2); \
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SLL $32, tmp2; \
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OR tmp2, dst
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#define ROUND1EVN(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW x, a; \
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ADDW X23, a; \
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XOR c, d, X23; \
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AND b, X23; \
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XOR d, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND1ODD(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW X23, a; \
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SRL $32, x, X23; \
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ADDW X23, a; \
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XOR c, d, X23; \
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AND b, X23; \
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XOR d, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND2EVN(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW x, a; \
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ADDW X23, a; \
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XOR b, c, X23; \
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AND d, X23; \
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XOR c, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND2ODD(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW X23, a; \
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SRL $32, x, X23; \
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ADDW X23, a; \
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XOR b, c, X23; \
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AND d, X23; \
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XOR c, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND3EVN(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW x, a; \
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ADDW X23, a; \
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XOR c, d, X23; \
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XOR b, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND3ODD(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW X23, a; \
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SRL $32, x, X23; \
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ADDW X23, a; \
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XOR c, d, X23; \
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XOR b, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND4EVN(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW x, a; \
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ADDW X23, a; \
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ORN d, b, X23; \
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XOR c, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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#define ROUND4ODD(a, b, c, d, x, const, shift) \
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MOV $const, X23; \
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ADDW X23, a; \
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SRL $32, x, X23; \
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ADDW X23, a; \
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ORN d, b, X23; \
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XOR c, X23; \
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ADDW X23, a; \
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RORIW $(32-shift), a; \
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ADDW b, a
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// Register use for the block function
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//
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// X5 - X12 : contain the 16 32 bit data items in the block we're
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// processing. Odd numbered values, e.g., x1, x3 are stored in
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// the upper 32 bits of the register.
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// X13 - X16 : a, b, c, d
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// X17 - X20 : used to store the old values of a, b, c, d, i.e., aa, bb, cc,
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// dd. X17 and X18 are also used as temporary registers when
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// loading unaligned data.
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// X22 : pointer to dig.s
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// X23 : temporary register
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// X28 : pointer to the first byte beyond the end of p
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// X29 : pointer to current 64 byte block of data, initially set to
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// &p[0]
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// X30 : temporary register
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TEXT ·block(SB),NOSPLIT,$0-32
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MOV p+8(FP), X29
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MOV p_len+16(FP), X30
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SRL $6, X30
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SLL $6, X30
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BEQZ X30, zero
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ADD X29, X30, X28
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MOV dig+0(FP), X22
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MOVWU (0*4)(X22), X13 // a = s[0]
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MOVWU (1*4)(X22), X14 // b = s[1]
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MOVWU (2*4)(X22), X15 // c = s[2]
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MOVWU (3*4)(X22), X16 // d = s[3]
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loop:
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// Load the 64 bytes of data in x0-15 into 8 64 bit registers, X5-X12.
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// Different paths are taken to load the values depending on whether the
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// buffer is 8 byte aligned or not. We load all the values up front
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// here at the start of the loop to avoid multiple alignment checks and
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// to reduce code size. It takes 10 instructions to load an unaligned
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// 32 bit value and this value will be used 4 times in the main body
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// of the loop below.
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AND $7, X29, X30
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BEQZ X30, aligned
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LOAD64U(X29,0, X17, X18, X5)
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LOAD64U(X29,8, X17, X18, X6)
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LOAD64U(X29,16, X17, X18, X7)
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LOAD64U(X29,24, X17, X18, X8)
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LOAD64U(X29,32, X17, X18, X9)
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LOAD64U(X29,40, X17, X18, X10)
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LOAD64U(X29,48, X17, X18, X11)
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LOAD64U(X29,56, X17, X18, X12)
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JMP block_loaded
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aligned:
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MOV (0*8)(X29), X5
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MOV (1*8)(X29), X6
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MOV (2*8)(X29), X7
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MOV (3*8)(X29), X8
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MOV (4*8)(X29), X9
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MOV (5*8)(X29), X10
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MOV (6*8)(X29), X11
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MOV (7*8)(X29), X12
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block_loaded:
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MOV X13, X17
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MOV X14, X18
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MOV X15, X19
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MOV X16, X20
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// Some of the hex constants below are too large to fit into a
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// signed 32 bit value. The assembler will handle these
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// constants in a special way to ensure that they are
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// zero extended. Our algorithm is only interested in the
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// bottom 32 bits and doesn't care whether constants are
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// sign or zero extended when moved into 64 bit registers.
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// So we use signed constants instead of hex when bit 31 is
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// set so all constants can be loaded by lui+addi.
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ROUND1EVN(X13,X14,X15,X16,X5, -680876936, 7); // 0xd76aa478
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ROUND1ODD(X16,X13,X14,X15,X5, -389564586,12); // 0xe8c7b756
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ROUND1EVN(X15,X16,X13,X14,X6, 0x242070db,17); // 0x242070db
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ROUND1ODD(X14,X15,X16,X13,X6, -1044525330,22); // 0xc1bdceee
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ROUND1EVN(X13,X14,X15,X16,X7, -176418897, 7); // 0xf57c0faf
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ROUND1ODD(X16,X13,X14,X15,X7, 0x4787c62a,12); // 0x4787c62a
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ROUND1EVN(X15,X16,X13,X14,X8, -1473231341,17); // 0xa8304613
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ROUND1ODD(X14,X15,X16,X13,X8, -45705983,22); // 0xfd469501
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ROUND1EVN(X13,X14,X15,X16,X9, 0x698098d8, 7); // 0x698098d8
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ROUND1ODD(X16,X13,X14,X15,X9, -1958414417,12); // 0x8b44f7af
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ROUND1EVN(X15,X16,X13,X14,X10, -42063,17); // 0xffff5bb1
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ROUND1ODD(X14,X15,X16,X13,X10,-1990404162,22); // 0x895cd7be
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ROUND1EVN(X13,X14,X15,X16,X11, 0x6b901122, 7); // 0x6b901122
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ROUND1ODD(X16,X13,X14,X15,X11, -40341101,12); // 0xfd987193
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ROUND1EVN(X15,X16,X13,X14,X12,-1502002290,17); // 0xa679438e
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ROUND1ODD(X14,X15,X16,X13,X12, 0x49b40821,22); // 0x49b40821
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ROUND2ODD(X13,X14,X15,X16,X5, -165796510, 5); // f61e2562
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ROUND2EVN(X16,X13,X14,X15,X8, -1069501632, 9); // c040b340
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ROUND2ODD(X15,X16,X13,X14,X10, 0x265e5a51,14); // 265e5a51
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ROUND2EVN(X14,X15,X16,X13,X5, -373897302,20); // e9b6c7aa
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ROUND2ODD(X13,X14,X15,X16,X7, -701558691, 5); // d62f105d
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ROUND2EVN(X16,X13,X14,X15,X10, 0x2441453, 9); // 2441453
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ROUND2ODD(X15,X16,X13,X14,X12, -660478335,14); // d8a1e681
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ROUND2EVN(X14,X15,X16,X13,X7, -405537848,20); // e7d3fbc8
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ROUND2ODD(X13,X14,X15,X16,X9, 0x21e1cde6, 5); // 21e1cde6
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ROUND2EVN(X16,X13,X14,X15,X12,-1019803690, 9); // c33707d6
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ROUND2ODD(X15,X16,X13,X14,X6, -187363961,14); // f4d50d87
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ROUND2EVN(X14,X15,X16,X13,X9, 0x455a14ed,20); // 455a14ed
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ROUND2ODD(X13,X14,X15,X16,X11,-1444681467, 5); // a9e3e905
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ROUND2EVN(X16,X13,X14,X15,X6, -51403784, 9); // fcefa3f8
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ROUND2ODD(X15,X16,X13,X14,X8, 0x676f02d9,14); // 676f02d9
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ROUND2EVN(X14,X15,X16,X13,X11,-1926607734,20); // 8d2a4c8a
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ROUND3ODD(X13,X14,X15,X16,X7, -378558, 4); // fffa3942
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ROUND3EVN(X16,X13,X14,X15,X9, -2022574463,11); // 8771f681
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ROUND3ODD(X15,X16,X13,X14,X10, 0x6d9d6122,16); // 6d9d6122
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ROUND3EVN(X14,X15,X16,X13,X12, -35309556,23); // fde5380c
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ROUND3ODD(X13,X14,X15,X16,X5, -1530992060, 4); // a4beea44
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ROUND3EVN(X16,X13,X14,X15,X7, 0x4bdecfa9,11); // 4bdecfa9
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ROUND3ODD(X15,X16,X13,X14,X8, -155497632,16); // f6bb4b60
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ROUND3EVN(X14,X15,X16,X13,X10,-1094730640,23); // bebfbc70
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ROUND3ODD(X13,X14,X15,X16,X11, 0x289b7ec6, 4); // 289b7ec6
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ROUND3EVN(X16,X13,X14,X15,X5, -358537222,11); // eaa127fa
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ROUND3ODD(X15,X16,X13,X14,X6, -722521979,16); // d4ef3085
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ROUND3EVN(X14,X15,X16,X13,X8, 0x4881d05,23); // 4881d05
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ROUND3ODD(X13,X14,X15,X16,X9, -640364487, 4); // d9d4d039
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ROUND3EVN(X16,X13,X14,X15,X11, -421815835,11); // e6db99e5
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ROUND3ODD(X15,X16,X13,X14,X12, 0x1fa27cf8,16); // 1fa27cf8
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ROUND3EVN(X14,X15,X16,X13,X6, -995338651,23); // c4ac5665
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ROUND4EVN(X13,X14,X15,X16,X5, -198630844, 6); // f4292244
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ROUND4ODD(X16,X13,X14,X15,X8, 0x432aff97,10); // 432aff97
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ROUND4EVN(X15,X16,X13,X14,X12,-1416354905,15); // ab9423a7
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ROUND4ODD(X14,X15,X16,X13,X7, -57434055,21); // fc93a039
|
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|
ROUND4EVN(X13,X14,X15,X16,X11, 0x655b59c3, 6); // 655b59c3
|
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ROUND4ODD(X16,X13,X14,X15,X6, -1894986606,10); // 8f0ccc92
|
||||||
|
ROUND4EVN(X15,X16,X13,X14,X10 ,-1051523,15); // ffeff47d
|
||||||
|
ROUND4ODD(X14,X15,X16,X13,X5, -2054922799,21); // 85845dd1
|
||||||
|
ROUND4EVN(X13,X14,X15,X16,X9, 0x6fa87e4f, 6); // 6fa87e4f
|
||||||
|
ROUND4ODD(X16,X13,X14,X15,X12, -30611744,10); // fe2ce6e0
|
||||||
|
ROUND4EVN(X15,X16,X13,X14,X8, -1560198380,15); // a3014314
|
||||||
|
ROUND4ODD(X14,X15,X16,X13,X11, 0x4e0811a1,21); // 4e0811a1
|
||||||
|
ROUND4EVN(X13,X14,X15,X16,X7, -145523070, 6); // f7537e82
|
||||||
|
ROUND4ODD(X16,X13,X14,X15,X10,-1120210379,10); // bd3af235
|
||||||
|
ROUND4EVN(X15,X16,X13,X14,X6, 0x2ad7d2bb,15); // 2ad7d2bb
|
||||||
|
ROUND4ODD(X14,X15,X16,X13,X9, -343485551,21); // eb86d391
|
||||||
|
|
||||||
|
ADDW X17, X13
|
||||||
|
ADDW X18, X14
|
||||||
|
ADDW X19, X15
|
||||||
|
ADDW X20, X16
|
||||||
|
|
||||||
|
ADD $64, X29
|
||||||
|
BNE X28, X29, loop
|
||||||
|
|
||||||
|
MOVW X13, (0*4)(X22)
|
||||||
|
MOVW X14, (1*4)(X22)
|
||||||
|
MOVW X15, (2*4)(X22)
|
||||||
|
MOVW X16, (3*4)(X22)
|
||||||
|
|
||||||
|
zero:
|
||||||
|
RET
|
||||||
Loading…
Reference in New Issue