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cmd/asm: add rev64 instruction on ARM64 

This change provides VREV64 instruction for AES-GCM implementation.

Change-Id: Icdf278862b03556388586f459964b025c47b8c19
Reviewed-on: https://go-review.googlesource.com/107696
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
Fangming.Fang 2018-04-18 02:55:09 +00:00 committed by Brad Fitzpatrick
parent f3962b1849
commit 206ed90eaf
6 changed files with 27 additions and 3 deletions
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2
src/cmd/asm/internal/asm/testdata/arm64.s vendored
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@ -309,6 +309,8 @@ TEXT foo(SB), DUPOK|NOSPLIT, $-8
VMOV V8.B[0], V12.B[1] // 0c05036e
VMOV V8.B[7], V4.B[8] // 043d116e
VREV32 V5.B16, V5.B16 // a508206e
VREV64 V2.S2, V3.S2 // 4308a00e
VREV64 V2.S4, V3.S4 // 4308a04e
VDUP V19.S[0], V17.S4 // 7106044e
//
// B/BL

2
src/cmd/asm/internal/asm/testdata/arm64error.s vendored
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@ -81,4 +81,6 @@ TEXT errors(SB),$0
VLD1.P (R8)(R9<<2), [V2.B16] // ERROR "invalid extended register"
VST1.P [V1.B16], (R8)(R9.UXTW) // ERROR "invalid extended register"
VST1.P [V1.B16], (R8)(R9<<1) // ERROR "invalid extended register"
VREV64 V1.H4, V2.H8 // ERROR "invalid arrangement"
VREV64 V1.D1, V2.D1 // ERROR "invalid arrangement"
RET

1
src/cmd/internal/obj/arm64/a.out.go
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@ -881,6 +881,7 @@ const (
AVLD1
AVORR
AVREV32
AVREV64
AVST1
AVDUP
AVMOVS

1
src/cmd/internal/obj/arm64/anames.go
View File

@ -383,6 +383,7 @@ var Anames = []string{
"VLD1",
"VORR",
"VREV32",
"VREV64",
"VST1",
"VDUP",
"VMOVS",

19
src/cmd/internal/obj/arm64/asm7.go
View File

@ -2387,6 +2387,7 @@ func buildop(ctxt *obj.Link) {
case AVREV32:
oprangeset(AVRBIT, t)
oprangeset(AVREV64, t)
case ASHA1H,
AVCNT,
@ -3964,8 +3965,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
rf := int((p.From.Reg) & 31)
rt := int((p.To.Reg) & 31)
Q := 0
size := 0
var Q, size uint32
switch af {
case ARNG_8B:
Q = 0
@ -3979,6 +3979,12 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
case ARNG_8H:
Q = 1
size = 1
case ARNG_2S:
Q = 0
size = 2
case ARNG_4S:
Q = 1
size = 2
default:
c.ctxt.Diag("invalid arrangement: %v\n", p)
}
@ -3987,6 +3993,10 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
c.ctxt.Diag("invalid arrangement: %v", p)
}
if p.As == AVREV32 && (af == ARNG_2S || af == ARNG_4S) {
c.ctxt.Diag("invalid arrangement: %v", p)
}
if p.As == AVMOV {
o1 |= uint32(rf&31) << 16
}
@ -3995,7 +4005,7 @@ func (c *ctxt7) asmout(p *obj.Prog, o *Optab, out []uint32) {
size = 1
}
o1 |= (uint32(Q&1) << 30) | (uint32(size&3) << 22) | (uint32(rf&31) << 5) | uint32(rt&31)
o1 |= (Q&1) << 30 | (size&3) << 22 | uint32(rf&31) << 5 | uint32(rt&31)
case 84: /* vst1 [Vt1.<T>, Vt2.<T>, ...], (Rn) */
r := int(p.To.Reg)
@ -5073,6 +5083,9 @@ func (c *ctxt7) oprrr(p *obj.Prog, a obj.As) uint32 {
case AVREV32:
return 11<<26 | 2<<24 | 1<<21 | 1<<11
case AVREV64:
return 3<<26 | 2<<24 | 1<<21 | 1<<11
case AVMOV:
return 7<<25 | 5<<21 | 7<<10

5
src/cmd/internal/obj/arm64/doc.go
View File

@ -258,6 +258,11 @@ Go Assembly for ARM64 Reference Manual
<T> Is an arrangement specifier and can have the following values:
B8, B16, H4, H8
VREV64: Reverse elements in 64-bit words (vector).
REV64 <Vn>.<T>, <Vd>.<T>
<T> Is an arrangement specifier and can have the following values:
B8, B16, H4, H8, S2, S4
VSHL: Shift Left(immediate)
VSHL $shift, <Vn>.<T>, <Vd>.<T>
<T> is an arrangement specifier and can have the following values: