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cmd/asm: add s390x 'rotate then ... selected bits' instructions
This CL adds the following instructions, useful for shifting/rotating and masking operations: * RNSBG - rotate then and selected bits * ROSBG - rotate then or selected bits * RXSBG - rotate then exclusive or selected bits * RISBG - rotate then insert selected bits It also adds the 'T' (test), 'Z' (zero), 'H' (high), 'L' (low) and 'N' (no test) variants of these instructions as appropriate. Operands are ordered as: I₃, I₄, I₅, R₂, R₁. Key: I₃=start, I₄=end, I₅=amount, R₂=source, R₁=destination Change-Id: I200d12287e1df7447f37f4919da5e9a93d27c792 Reviewed-on: https://go-review.googlesource.com/c/go/+/159357 Run-TryBot: Michael Munday <mike.munday@ibm.com> TryBot-Result: Gobot Gobot <gobot@golang.org> Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
This commit is contained in:
Michael Munday
parent
9c843f031d
commit
0f79510dc5
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@ -789,6 +789,12 @@ func (p *Parser) asmInstruction(op obj.As, cond string, a []obj.Addr) {
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prog.To = a[4]
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break
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}
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if p.arch.Family == sys.S390X {
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prog.From = a[0]
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prog.RestArgs = []obj.Addr{a[1], a[2], a[3]}
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prog.To = a[4]
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break
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}
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p.errorf("can't handle %s instruction with 5 operands", op)
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return
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case 6:
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@ -182,6 +182,21 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16-
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XORW (R1), R2 // 57201000
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XORW -1(R1), R2 // e3201fffff57
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RNSBG $0, $31, $32, R1, R2 // ec21001f2054
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RXSBG $17, $8, $16, R3, R4 // ec4311081057
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ROSBG $9, $24, $11, R5, R6 // ec6509180b56
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RNSBGT $0, $31, $32, R7, R8 // ec87801f2054
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RXSBGT $17, $8, $16, R9, R10 // eca991081057
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ROSBGT $9, $24, $11, R11, R0 // ec0b89180b56
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RISBG $0, $31, $32, R1, R2 // ec21001f2055
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RISBGN $17, $8, $16, R3, R4 // ec4311081059
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RISBGZ $9, $24, $11, R5, R6 // ec6509980b55
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RISBGNZ $0, $31, $32, R7, R8 // ec87009f2059
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RISBHG $17, $8, $16, R9, R10 // eca91108105d
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RISBLG $9, $24, $11, R11, R0 // ec0b09180b51
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RISBHGZ $17, $8, $16, R9, R10 // eca91188105d
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RISBLGZ $9, $24, $11, R11, R0 // ec0b09980b51
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LAA R1, R2, 524287(R3) // eb213fff7ff8
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LAAG R4, R5, -524288(R6) // eb54600080e8
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LAAL R7, R8, 8192(R9) // eb87900002fa
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@ -289,6 +289,20 @@ const (
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ASRAD
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ARLL
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ARLLG
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ARNSBG
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ARXSBG
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AROSBG
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ARNSBGT
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ARXSBGT
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AROSBGT
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ARISBG
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ARISBGN
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ARISBGZ
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ARISBGNZ
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ARISBHG
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ARISBLG
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ARISBHGZ
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ARISBLGZ
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// floating point
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AFABS
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@ -60,6 +60,20 @@ var Anames = []string{
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"SRAD",
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"RLL",
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"RLLG",
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"RNSBG",
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"RXSBG",
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"ROSBG",
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"RNSBGT",
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"RXSBGT",
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"ROSBGT",
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"RISBG",
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"RISBGN",
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"RISBGZ",
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"RISBGNZ",
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"RISBHG",
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"RISBLG",
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"RISBHGZ",
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"RISBLGZ",
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"FABS",
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"FADD",
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"FADDS",
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@ -196,6 +196,7 @@ var optab = []Optab{
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Optab{i: 7, as: ASLD, a1: C_REG, a2: C_REG, a6: C_REG},
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Optab{i: 7, as: ASLD, a1: C_SCON, a2: C_REG, a6: C_REG},
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Optab{i: 7, as: ASLD, a1: C_SCON, a6: C_REG},
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Optab{i: 13, as: ARNSBG, a1: C_SCON, a3: C_SCON, a4: C_SCON, a5: C_REG, a6: C_REG},
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// compare and swap
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Optab{i: 79, as: ACSG, a1: C_REG, a2: C_REG, a6: C_SOREG},
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@ -953,6 +954,20 @@ func buildop(ctxt *obj.Link) {
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opset(ASRAW, r)
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opset(ARLL, r)
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opset(ARLLG, r)
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case ARNSBG:
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opset(ARXSBG, r)
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opset(AROSBG, r)
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opset(ARNSBGT, r)
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opset(ARXSBGT, r)
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opset(AROSBGT, r)
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opset(ARISBG, r)
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opset(ARISBGN, r)
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opset(ARISBGZ, r)
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opset(ARISBGNZ, r)
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opset(ARISBHG, r)
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opset(ARISBLG, r)
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opset(ARISBHGZ, r)
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opset(ARISBLGZ, r)
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case ACSG:
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opset(ACS, r)
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case ASUB:
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@ -2993,6 +3008,37 @@ func (c *ctxtz) asmout(p *obj.Prog, asm *[]byte) {
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zRXY(opxy, uint32(r1), uint32(x2), uint32(b2), uint32(d2), asm)
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}
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case 13: // rotate, followed by operation
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r1 := p.To.Reg
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r2 := p.RestArgs[2].Reg
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i3 := uint8(p.From.Offset) // start
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i4 := uint8(p.RestArgs[0].Offset) // end
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i5 := uint8(p.RestArgs[1].Offset) // rotate amount
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switch p.As {
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case ARNSBGT, ARXSBGT, AROSBGT:
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i3 |= 0x80 // test-results
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case ARISBGZ, ARISBGNZ, ARISBHGZ, ARISBLGZ:
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i4 |= 0x80 // zero-remaining-bits
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}
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var opcode uint32
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switch p.As {
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case ARNSBG, ARNSBGT:
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opcode = op_RNSBG
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case ARXSBG, ARXSBGT:
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opcode = op_RXSBG
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case AROSBG, AROSBGT:
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opcode = op_ROSBG
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case ARISBG, ARISBGZ:
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opcode = op_RISBG
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case ARISBGN, ARISBGNZ:
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opcode = op_RISBGN
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case ARISBHG, ARISBHGZ:
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opcode = op_RISBHG
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case ARISBLG, ARISBLGZ:
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opcode = op_RISBLG
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}
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zRIE(_f, uint32(opcode), uint32(r1), uint32(r2), 0, uint32(i3), uint32(i4), 0, uint32(i5), asm)
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case 15: // br/bl (reg)
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r := p.To.Reg
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if p.As == ABCL || p.As == ABL {
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